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Searched refs:lsr (Results 1 – 17 of 17) sorted by relevance

/libcpu/aarch64/common/
A Dcache.S29 and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */
32 and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */
69 lsr x11, x10, #24
82 lsr x12, x10, x12
122 lsr x3, x3, #16
148 lsr x3, x3, #16
A Dcpu_gcc.S48 lsr x0, x0, #8
/libcpu/arm/cortex-r52/
A Dcp15_gcc.S60 mov r3, r3, lsr #23 @ left align loc bit field
64 add r2, r10, r10, lsr #1 @ work out 3x current cache level
65 mov r1, r0, lsr r2 @ extract cache type bits from clidr
75 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
78 ands r7, r7, r1, lsr #13 @ extract max number of the index size
104 mov r3, r3, lsr #23
108 add r2, r10, r10, lsr #1
109 mov r1, r0, lsr r2
119 ands r4, r4, r1, lsr #3
122 ands r7, r7, r1, lsr #13
/libcpu/arm/realview-a8-vmm/
A Dcp15_gcc.S47 mov r3, r3, lsr #23
51 add r2, r10, r10, lsr #1
52 mov r1, r0, lsr r2
62 ands r4, r4, r1, lsr #3
65 ands r7, r7, r1, lsr #13
/libcpu/arm/am335x/
A Dcp15_gcc.S52 mov r3, r3, lsr #23
56 add r2, r10, r10, lsr #1
57 mov r1, r0, lsr r2
67 ands r4, r4, r1, lsr #3
70 ands r7, r7, r1, lsr #13
A Dcp15_iar.s55 MOV r3, r3, lsr #23
59 ADD r2, r10, r10, lsr #1
60 MOV r1, r0, lsr r2
71 ANDS r4, r4, r1, lsr #3
75 ANDS r7, r7, r1, lsr #13
/libcpu/arm/cortex-a/
A Dcp15_gcc.S52 mov r3, r3, lsr #23
56 add r2, r10, r10, lsr #1
57 mov r1, r0, lsr r2
67 ands r4, r4, r1, lsr #3
70 ands r7, r7, r1, lsr #13
/libcpu/unicore32/sep6200/
A Dserial.c132 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_serial_read()
188 while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY)); in rt_serial_write()
192 while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY)); in rt_serial_write()
256 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_hw_serial_isr()
A Dserial.h73 rt_uint32_t lsr; member
/libcpu/arm/sep4020/
A Dserial.c134 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_serial_read()
190 while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY)); in rt_serial_write()
194 while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY)); in rt_serial_write()
258 while (uart->uart_device->lsr & USTAT_RCV_READY) in rt_hw_serial_isr()
A Dserial.h66 rt_uint32_t lsr; member
/libcpu/blackfin/bf53x/
A Dserial.h38 volatile rt_uint16_t lsr; //line status register member
A Dserial.c197 while (!(uart->uart_device->lsr & 0x20)); in rt_serial_write()
201 while (!(uart->uart_device->lsr & 0x20)); in rt_serial_write()
/libcpu/arm/armv6/
A Darm_entry_gcc.S107 add pc, pc, r8, lsr #6
/libcpu/arm/common/
A Ddivsi3.S75 movs r1, r1, lsr #1
102 orr ip, r2, ip, lsr #1 /* ip bit 0x40000000 = -ve division */
/libcpu/aarch64/cortex-a/
A Dentry_point.S178 lsr x0, x0, #2
/libcpu/arc/em/
A Dcontex_gcc_mw.S179 lsr r0, r0, 16

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