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Searched refs:mtmsr (Results 1 – 3 of 3) sorted by relevance

/libcpu/ppc/ppc405/
A Dcontext_gcc.S23 mtmsr r4
32mtmsr r4 /* ...critical and non-critical interrupts …
41 mtmsr r3
A Dstart_gcc.S507 mtmsr r28
538 mtmsr r28
/libcpu/ppc/ppc405/include/asm/
A Dprocessor.h1034 #define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v)) macro

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