Searched refs:ops (Results 1 – 10 of 10) sorted by relevance
| /libcpu/arm/cortex-m7/ |
| A D | cpu_cache.c | 37 void rt_hw_cpu_icache_ops(int ops, void* addr, int size) in rt_hw_cpu_icache_ops() argument
42 if (ops & RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
71 void rt_hw_cpu_dcache_ops(int ops, void* addr, int size) in rt_hw_cpu_dcache_ops() argument
77 if ((ops & clean_invalid) == clean_invalid) in rt_hw_cpu_dcache_ops()
81 else if (ops & RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
85 else if (ops & RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_dcache_ops()
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| /libcpu/risc-v/virt64/ |
| A D | cache.c | 27 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
29 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
35 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
37 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
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| /libcpu/mips/gs264/ |
| A D | cache.c | 48 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
50 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
54 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
56 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
58 else if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_dcache_ops()
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| /libcpu/aarch64/common/ |
| A D | cache_ops.c | 51 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
53 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
59 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
61 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
65 else if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_dcache_ops()
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| A D | setup.c | 176 struct cpu_ops_t *ops = cpu_ops[idx]; in cpu_info_init() local
178 if (ops->cpu_init) in cpu_info_init()
180 ops->cpu_init(i, np); in cpu_info_init()
353 struct cpu_ops_t *ops = cpu_ops[idx]; in rt_hw_secondary_cpu_up() local
355 if (ops->method && !rt_strcmp(ops->method, enable_method) && ops->cpu_boot) in rt_hw_secondary_cpu_up()
357 err = ops->cpu_boot(i, entry); in rt_hw_secondary_cpu_up()
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| /libcpu/arm/cortex-a/ |
| A D | cache.c | 127 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
129 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
135 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
137 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
141 else if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_dcache_ops()
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| /libcpu/risc-v/t-head/c906/ |
| A D | cache.c | 105 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
107 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
113 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
115 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
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| /libcpu/risc-v/t-head/c908/ |
| A D | cache.c | 116 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
118 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
124 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
126 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
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| /libcpu/arm/zynqmp-r5/ |
| A D | cache.c | 415 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument
417 if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_icache_ops()
421 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument
423 if (ops == RT_HW_CACHE_FLUSH) in rt_hw_cpu_dcache_ops()
425 else if (ops == RT_HW_CACHE_INVALIDATE) in rt_hw_cpu_dcache_ops()
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| /libcpu/risc-v/common/ |
| A D | readme.md | 13 | riscv-ops.h | 控制状态寄存器读写 |
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