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Searched refs:r14 (Results 1 – 13 of 13) sorted by relevance

/libcpu/unicore32/sep6200/
A Dcontext_gcc.S51 stm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp-]
65 ldm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+
79 ldm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+
A Dtrap.c35 …rt_kprintf("r12:0x%08x r13:0x%08x r14:0x%08x r15:0x%08x\n", regs->r12,regs->r13,regs->r14,regs->r1… in rt_hw_show_register()
A Dsep6200.h432 rt_uint32_t r14; member
/libcpu/xilinx/microblaze/
A Dcontext_gcc.S93 RTID r14, 0 /* IE bit will be set automatically */
111 RTID r14, 0 /* IE bit will be set automatically */
180 RTID r14, 0
216 RTID r14, 0 /* IE bit will be set automatically */
A Dmicroblaze.inc59 SWI r14, r1, STACK_R14
95 LWI r14, r1, STACK_R14
/libcpu/nios/nios_ii/
A Dvector.S45 ldw r14, 60(sp)
/libcpu/ppc/ppc405/
A Dstart_gcc.S170 1: mflr r14 ; \
171 lwz r0,0b-1b(r14) ; \
172 add r14,r0,r14 ;
176 #define GOT(NAME) .L_ ## NAME (r14)
/libcpu/v850/70f34/
A Dmacdefs.inc39 sst.w r14, 44[ep]
A Dcontext_iar.S67 sld.w 44[ep],r14
A Dcontext_iar.asm67 sld.w 44[ep],r14
/libcpu/arm/zynqmp-r5/
A Dxreg_cortexr5.h48 #define XREG_GPR14 r14
/libcpu/arm/cortex-a/
A Dcontext_gcc.S246 ldmfd sp, {r13, r14}^ /* usr_sp, usr_lr */
A Dstart_gcc.S348 stmfd r0, {r13, r14}^ /* usr_sp, usr_lr */
447 stmfd sp, {r13, r14}^ /*push usr_sp, usr_lr */
494 ldmfd sp, {r13, r14}^ /*pop usr_sp, usr_lr */

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