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Searched refs:r17 (Results 1 – 7 of 7) sorted by relevance

/libcpu/v850/70f34/
A Dcontext_iar.S72 stsr ecr, r17 ;Move ecr to r17
74 cmp r1, r17 ;If latest break was due to TRAP, set EP
78 mov 0x20, r17 ;Set only ID
79 ldsr r17, psw
95 mov 0x60, r17 ;Set both EIPC and ID bits
96 ldsr r17, psw
A Dcontext_iar.asm72 stsr ecr, r17 ;Move ecr to r17
74 cmp r1, r17 ;If latest break was due to TRAP, set EP
78 mov 0x20, r17 ;Set only ID
79 ldsr r17, psw
95 mov 0x60, r17 ;Set both EIPC and ID bits
96 ldsr r17, psw
/libcpu/nios/nios_ii/
A Dcontext_gcc.S67 stw r17, 32(sp)
106 ldw r17, 32(sp)
148 stw r17, 32(sp)
188 ldw r17, 32(sp)
260 ldw r17, 32(sp)
/libcpu/unicore32/sep6200/
A Dcontext_gcc.S50 stm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr), [sp-]
66 ldm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr, pc), [sp]+
80 ldm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr, pc), [sp]+
A Dtrap.c36 …rt_kprintf("r16:0x%08x r17:0x%08x r18:0x%08x r19:0x%08x\n", regs->r16,regs->r17,regs->r18,regs->r1… in rt_hw_show_register()
A Dsep6200.h435 rt_uint32_t r17; member
/libcpu/xilinx/microblaze/
A Dmicroblaze.inc61 SWI r17, r1, STACK_R17
93 LWI r17, r1, STACK_R17

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