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Searched refs:r4 (Results 1 – 25 of 111) sorted by relevance

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/libcpu/ppc/ppc405/
A Dcache_gcc.S24 subf r4,r3,r4
25 add r4,r4,r5
26 srwi. r4,r4,L1_CACHE_SHIFT
53 subf r4,r3,r4
54 add r4,r4,r5
55 srwi. r4,r4,L1_CACHE_SHIFT
75 subf r4,r3,r4
76 add r4,r4,r5
77 srwi. r4,r4,L1_CACHE_SHIFT
98 subf r4,r3,r4
[all …]
A Dcontext_gcc.S19 li r4,0
20 ori r4,r4,MSR_EE
21 andc r4,r4,r3
23 mtmsr r4
29 ori r4, r4, 0x7FFF
58 lwz r4,0(r3)
62 stw r4,0(r3)
78 mfspr r4,SPRG0
103 ori r4,r4,rt_interrupt_to_thread@l
104 lwz r1,0(r4)
[all …]
A Dstart_gcc.S387 mtdcwr r4
403 ori r4, r4, CONFIG_SYS_ICACHE_SACR_VALUE@l
404 mticcr r4
409 ori r4, r4, CONFIG_SYS_DCACHE_SACR_VALUE@l
410 mtdccr r4
423 ori r4,r4,END_BSS@l
424 sub r4,r4,r3 // calculate length of BSS
425 srwi r4,r4,2 // convert byte-length to word-length
502 li r4,0
534 li r4,0
[all …]
/libcpu/arm/lpc214x/
A Dcontext_gcc.S52 MRS r4, cpsr /* 读取CPSR寄存器到R4寄存器 */
53 STMFD sp!, {r4} /* push cpsr */
55 MRS r4, spsr /* 读取SPSR寄存器到R4寄存器 */
56 STMFD sp!, {r4} /* push spsr */
66 LDMFD sp!, {r4} /* pop new task spsr */
68 MSR spsr_cxsf, r4 /* 恢复SPSR寄存器 */
69 LDMFD sp!, {r4} /* pop new task cpsr */
71 MSR cpsr_cxsf, r4 /* 恢复CPSR寄存器 */
82 LDMFD sp!, {r4} /* pop new task spsr */
84 MSR spsr_cxsf, r4 /* 恢复SPSR寄存器 */
[all …]
A Dcontext_rvds.S60 MRS r4, cpsr
63 ORR r4, r4, #0x20 ; it's thumb code
137 STMFD sp!, {r4-r12,lr}; push old task's lr,r12-r4
138 MOV r4, r1 ; Special optimised code below
140 LDMFD r4!, {r0-r3}
144 LDR r4, =rt_interrupt_from_thread
145 LDR r5, [r4]
152 LDMFD sp!, {r4} ; pop new task's cpsr to spsr
/libcpu/arm/AT91SAM7S/
A Dcontext_gcc.S41 mrs r4, cpsr
42 stmfd sp!, {r4} /* push cpsr */
43 mrs r4, spsr
44 stmfd sp!, {r4} /* push spsr */
49 ldmfd sp!, {r4} /* pop new task spsr */
50 msr spsr_cxsf, r4
51 ldmfd sp!, {r4} /* pop new task cpsr */
52 msr cpsr_cxsf, r4
64 ldmfd sp!, {r4} /* pop new task spsr */
65 msr spsr_cxsf, r4
[all …]
A Dcontext_rvds.S48 MRS r4, cpsr
49 STMFD sp!, {r4} ; push cpsr
50 MRS r4, spsr
51 STMFD sp!, {r4} ; push spsr
56 LDMFD sp!, {r4} ; pop new task spsr
57 MSR spsr_cxsf, r4
58 LDMFD sp!, {r4} ; pop new task cpsr
59 MSR cpsr_cxsf, r4
72 LDMFD sp!, {r4} ; pop new task spsr
73 MSR spsr_cxsf, r4
[all …]
/libcpu/unicore32/sep6200/
A Dcontext_gcc.S52 mov r4, asr
53 stm.w (r4), [sp-]
54 mov r4, bsr
55 stm.w (r4), [sp-]
60 ldm.w (r4), [sp]+
61 mov.a bsr,r4
62 ldm.w (r4), [sp]+
63 mov.a asr, r4
75 ldm.w (r4), [sp]+
76 mov.a bsr, r4
[all …]
/libcpu/arm/s3c44b0/
A Dcontext_gcc.S46 mrs r4, cpsr
47 stmfd sp!, {r4} @ push cpsr
48 mrs r4, spsr
49 stmfd sp!, {r4} @ push spsr
54 ldmfd sp!, {r4} @ pop new task spsr
55 msr spsr_cxsf, r4
56 ldmfd sp!, {r4} @ pop new task cpsr
57 msr cpsr_cxsf, r4
69 ldmfd sp!, {r4} @ pop new task spsr
70 msr spsr_cxsf, r4
[all …]
A Dcontext_rvds.S48 MRS r4, cpsr
49 STMFD sp!, {r4} ; push cpsr
50 MRS r4, spsr
51 STMFD sp!, {r4} ; push spsr
56 LDMFD sp!, {r4} ; pop new task spsr
57 MSR spsr_cxsf, r4
58 LDMFD sp!, {r4} ; pop new task cpsr
59 MSR cpsr_cxsf, r4
72 LDMFD sp!, {r4} ; pop new task spsr
73 MSR spsr_cxsf, r4
[all …]
/libcpu/arm/lpc24xx/
A Dcontext_gcc.S46 mrs r4, cpsr
47 stmfd sp!, {r4} @ push cpsr
48 mrs r4, spsr
49 stmfd sp!, {r4} @ push spsr
54 ldmfd sp!, {r4} @ pop new task spsr
55 msr spsr_cxsf, r4
56 ldmfd sp!, {r4} @ pop new task cpsr
57 msr cpsr_cxsf, r4
69 ldmfd sp!, {r4} @ pop new task spsr
70 msr spsr_cxsf, r4
[all …]
/libcpu/arm/s3c24x0/
A Dcontext_gcc.S46 mrs r4, cpsr
47 stmfd sp!, {r4} @ push cpsr
48 mrs r4, spsr
49 stmfd sp!, {r4} @ push spsr
54 ldmfd sp!, {r4} @ pop new task spsr
55 msr spsr_cxsf, r4
56 ldmfd sp!, {r4} @ pop new task cpsr
57 msr spsr_cxsf, r4
69 ldmfd sp!, {r4} @ pop new task spsr
70 msr spsr_cxsf, r4
[all …]
A Dcontext_rvds.S48 MRS r4, cpsr
49 STMFD sp!, {r4} ; push cpsr
50 MRS r4, spsr
51 STMFD sp!, {r4} ; push spsr
56 LDMFD sp!, {r4} ; pop new task spsr
57 MSR spsr_cxsf, r4
58 LDMFD sp!, {r4} ; pop new task cpsr
59 MSR spsr_cxsf, r4
72 LDMFD sp!, {r4} ; pop new task spsr
73 MSR spsr_cxsf, r4
[all …]
/libcpu/arm/AT91SAM7X/
A Dcontext_gcc.S46 mrs r4, cpsr
47 stmfd sp!, {r4} @ push cpsr
48 mrs r4, spsr
49 stmfd sp!, {r4} @ push spsr
54 ldmfd sp!, {r4} @ pop new task spsr
55 msr spsr_cxsf, r4
56 ldmfd sp!, {r4} @ pop new task cpsr
57 msr cpsr_cxsf, r4
69 ldmfd sp!, {r4} @ pop new task spsr
70 msr spsr_cxsf, r4
[all …]
A Dcontext_rvds.S48 MRS r4, cpsr
49 STMFD sp!, {r4} ; push cpsr
50 MRS r4, spsr
51 STMFD sp!, {r4} ; push spsr
56 LDMFD sp!, {r4} ; pop new task spsr
57 MSR spsr_cxsf, r4
58 LDMFD sp!, {r4} ; pop new task cpsr
59 MSR cpsr_cxsf, r4
72 LDMFD sp!, {r4} ; pop new task spsr
73 MSR spsr_cxsf, r4
[all …]
/libcpu/arm/dm36x/
A Dcontext_rvds.S48 MRS r4, cpsr
49 STMFD sp!, {r4} ; push cpsr
50 MRS r4, spsr
51 STMFD sp!, {r4} ; push spsr
56 LDMFD sp!, {r4} ; pop new task spsr
57 MSR spsr_cxsf, r4
58 LDMFD sp!, {r4} ; pop new task cpsr
59 MSR spsr_cxsf, r4
72 LDMFD sp!, {r4} ; pop new task spsr
73 MSR spsr_cxsf, r4
[all …]
/libcpu/arm/sep4020/
A Dcontext_rvds.S48 MRS r4, cpsr
49 STMFD sp!, {r4} ; push cpsr
50 MRS r4, spsr
51 STMFD sp!, {r4} ; push spsr
56 LDMFD sp!, {r4} ; pop new task spsr
57 MSR spsr_cxsf, r4
58 LDMFD sp!, {r4} ; pop new task cpsr
59 MSR cpsr_cxsf, r4
72 LDMFD sp!, {r4} ; pop new task spsr
73 MSR spsr_cxsf, r4
[all …]
/libcpu/xilinx/microblaze/
A Dcontext_gcc.S27 SW r4, r1, r0
30 ANDNI r4, r3, IE_BIT
31 MTS RMSR, r4
33 LW r4, r1, r0
127 ANDI r4, r4, 1
131 SWI r4, r3, 0
169 LWI r4, r3, 0
171 ANDI r4, r4, 1
172 BNEI r4, rt_hw_context_switch_interrupt_do
190 LW r4, r0, r3
[all …]
/libcpu/nios/nios_ii/
A Dcontext_gcc.S56 stw r4, 12(sp)
59 ldw r4,%gprel(rt_current_thread_entry)(gp)
60 stw r4, 0(sp) /* thread pc */
82 stw sp, (r4)
92 ldw sp, (r4)
100 ldw r4, 12(sp)
142 stw r4, 12(sp)
161 stw sp, (r4)
182 ldw r4, 12(sp)
245 ldw sp, (r4) // sp = *r4
[all …]
/libcpu/arm/realview-a8-vmm/
A Dcontext_gcc.S39 ldmfd sp!, {r4} @ pop new task spsr
40 msr spsr_cxsf, r4
61 mrs r4, cpsr
63 orrne r4, r4, #0x20 @ it's thumb code
/libcpu/arm/cortex-m0/
A Dcontext_iar.S107 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
111 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
113 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
117 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
124 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
125 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
127 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
128 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
133 POP {r4 - r7} ; pop {r4 - r7} from MSP
A Dcontext_rvds.S111 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
115 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
117 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
121 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
128 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
129 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
131 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
132 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
137 POP {r4 - r7} ; pop {r4 - r7} from MSP
/libcpu/arm/cortex-m23/
A Dcontext_iar.S108 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
112 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
114 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
118 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
125 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
126 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
128 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
129 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
134 POP {r4 - r7} ; pop {r4 - r7} from MSP
A Dcontext_rvds.S112 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
116 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
118 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
122 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
129 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
130 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
132 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
133 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
138 POP {r4 - r7} ; pop {r4 - r7} from MSP
/libcpu/arm/zynqmp-r5/
A Dcontext_gcc.S45 ldmfd sp!, {r4} @ pop new task spsr
46 msr spsr_cxsf, r4
62 mrs r4, cpsr
65 orr r4, r4, #0x20 @ it's thumb code

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