| /libcpu/arm/cortex-m0/ |
| A D | context_iar.S | 107 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
111 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
113 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
116 MOV r7, r11
117 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
124 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
125 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
127 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
128 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
131 MOV r11, r7
[all …]
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| A D | context_rvds.S | 111 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
115 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
117 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
120 MOV r7, r11
121 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
128 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
129 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
131 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
132 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
135 MOV r11, r7
[all …]
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| /libcpu/arm/cortex-m23/ |
| A D | context_iar.S | 108 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
112 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
114 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
117 MOV r7, r11
118 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
125 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
126 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
128 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
129 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
132 MOV r11, r7
[all …]
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| A D | context_rvds.S | 112 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
116 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
118 MOV r4, r8 ; mov thread {r8 - r11} to {r4 - r7}
121 MOV r7, r11
122 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
129 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
130 PUSH {r4 - r7} ; push {r4 - r7} to MSP for copy {r8 - r11}
132 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
133 MOV r8, r4 ; mov {r4 - r7} to {r8 - r11}
136 MOV r11, r7
[all …]
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| A D | cpuport.h | 34 rt_uint32_t r7; member
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| /libcpu/arm/cortex-r52/ |
| A D | cp15_gcc.S | 77 ldr r7, =0x7fff
78 ands r7, r7, r1, lsr #13 @ extract max number of the index size
83 orr r11, r11, r7, lsl r2 @ factor index number into r11
87 subs r7, r7, #1 @ decrement the index
121 ldr r7, _FLD_MAX_IDX
122 ands r7, r7, r1, lsr #13
127 orr r11, r11, r7, lsl r2
131 subs r7, r7, #1
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| A D | cpuport.h | 23 unsigned long r7; member
45 unsigned long r7; member
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| A D | armv8.h | 22 unsigned long r7; member
44 unsigned long r7; member
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| /libcpu/arm/am335x/ |
| A D | cp15_iar.s | 73 ;LDR r7, _FLD_MAX_IDX
74 LDR r7, =0x7FF
75 ANDS r7, r7, r1, lsr #13
80 ORR r11, r11, r7, lsl r2
84 SUBS r7, r7, #1
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| A D | cp15_gcc.S | 69 ldr r7, _FLD_MAX_IDX
70 ands r7, r7, r1, lsr #13
75 orr r11, r11, r7, lsl r2
79 subs r7, r7, #1
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| /libcpu/arm/realview-a8-vmm/ |
| A D | cp15_gcc.S | 64 ldr r7, _FLD_MAX_IDX
65 ands r7, r7, r1, lsr #13
70 orr r11, r11, r7, lsl r2
74 subs r7, r7, #1
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| A D | armv7.h | 22 unsigned long r7; member
44 unsigned long r7; member
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| /libcpu/arm/cortex-a/ |
| A D | cp15_gcc.S | 69 ldr r7, _FLD_MAX_IDX
70 ands r7, r7, r1, lsr #13
75 orr r11, r11, r7, lsl r2
79 subs r7, r7, #1
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| A D | cpuport.h | 25 unsigned long r7; member
47 unsigned long r7; member
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| /libcpu/arm/armv6/ |
| A D | arm_entry_gcc.S | 91 ldr r7, [r6], #4 @ load mask value
92 cmp r7, #0 @ end mask?
94 and r8, r0, r7
95 ldr r7, [r6], #4 @ load opcode value
96 cmp r8, r7 @ is NEON instruction?
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| A D | armv6.h | 37 rt_uint32_t r7; member
56 rt_uint32_t r7; member
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| /libcpu/avr32/uc3/ |
| A D | context_gcc.S | 48 stm --sp, r0-r7 /* Push R0-R7 */
54 ldm sp++, r0-r7 /* pop R0-R7 */
68 ldm sp++, r0-r7 /* pop R0-R7 */
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| A D | exception_gcc.S | 258 stm --sp, r0-r7 /* Push R0-R7 */
265 ldm sp++, r0-r7 /* Pop R0-R7 (new thread) */
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| /libcpu/ppc/ppc405/ |
| A D | cache_gcc.S | 135 lis r7,(DCACHE_SIZE / L1_CACHE_BYTES / 2)@ha /* TBS for large sized cache */
136 ori r7,r7,(DCACHE_SIZE / L1_CACHE_BYTES / 2)@l
138 mtctr r7 /* ways in the D cache */
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| /libcpu/nios/nios_ii/ |
| A D | context_gcc.S | 64 stw r7, 24(sp)
103 ldw r7, 24(sp)
145 stw r7, 24(sp)
185 ldw r7, 24(sp)
257 ldw r7, 24(sp)
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| /libcpu/unicore32/sep6200/ |
| A D | context_gcc.S | 51 stm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp-]
65 ldm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+
79 ldm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+
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| /libcpu/arm/zynqmp-r5/ |
| A D | armv7.h | 24 unsigned long r7; member
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| /libcpu/arm/cortex-r4/ |
| A D | armv7.h | 26 unsigned long r7; member
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| /libcpu/c-sky/ck802/ |
| A D | contex_ck802_gcc.S | 116 lrw r7, rt_interrupt_from_thread
118 stw r8, (r7)
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| /libcpu/arm/arm926/ |
| A D | trap.c | 32 rt_uint32_t r7; member
61 regs->r4, regs->r5, regs->r6, regs->r7); in rt_hw_show_register()
|