1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2010-03-20     zchong      first version
9  */
10 
11 #include <rtthread.h>
12 #include "sep4020.h"
13 
14 #define CLK_IN          4000000     /* Fin = 4.00MHz  */
15 #define SYSCLK          72000000    /* system clock we want */
16 
17 #define CLK_ESRAM       0
18 #define CLK_LCDC        1
19 #define CLK_PWM         2
20 #define CLK_DMAC        3
21 #define CLK_EMI         4
22 #define CLK_MMCSD       5
23 #define CLK_SSI         7
24 #define CLK_UART0       8
25 #define CLK_UART1       9
26 #define CLK_UART2       10
27 #define CLK_UART3       11
28 #define CLK_USB         12
29 #define CLK_MAC         13
30 #define CLK_SMC         14
31 #define CLK_I2C         15
32 #define CLK_GPT         16
33 
rt_hw_set_system_clock(void)34 static void rt_hw_set_system_clock(void)
35 {
36     rt_uint8_t pv;
37 
38     /* pv value*/
39     pv  = SYSCLK/2/CLK_IN;
40     /* go to normal mode*/
41     *(RP)PMU_PMDR = 0x01;
42     /* set the clock */
43     *(RP)PMU_PMCR = 0x4000 | pv;
44     /* trige configurate*/
45     *(RP)PMU_PMCR = 0xc000 | pv;
46 }
47 
rt_hw_set_usb_clock(void)48 static void rt_hw_set_usb_clock(void)
49 {
50     /* set the clock */
51     *(RP)PMU_PUCR = 0x000c;
52     /* trige configurate*/
53     *(RP)PMU_PMCR = 0x800c;
54 
55 }
56 
57 /**
58  * @brief System Clock Configuration
59  */
rt_hw_clock_init(void)60 void rt_hw_clock_init(void)
61 {
62     /* set system clock */
63     rt_hw_set_system_clock();
64     /* set usb clock */
65     rt_hw_set_usb_clock();
66 }
67 
68 /**
69  * @brief Get system clock
70  */
rt_hw_get_clock(void)71 rt_uint32_t rt_hw_get_clock(void)
72 {
73     rt_uint32_t val;
74     rt_uint8_t pv, pd, npd;
75 
76     /* get PMCR value */
77     val =*(RP) PMU_PMCR;
78     /* get NPD */
79     npd = (val >> 14) & 0x01;
80     /* get PD  */
81     pd  = (val >> 10) & 0x0f;
82     /* get PV  */
83     pv  = val & 0x7f;
84     /* caculate the system clock */
85     if(npd)
86         val = 2 * CLK_IN * pv;
87     else
88         val = CLK_IN * pv / (pd + 1);
89 
90     return(val);
91 }
92 
93 /**
94  * @brief Enable module clock
95  */
rt_hw_enable_module_clock(rt_uint8_t module)96  void rt_hw_enable_module_clock(rt_uint8_t module)
97  {
98 
99  }
100 
101 /**
102  * @brief Disable module clock
103  */
rt_hw_disable_module_clock(rt_uint8_t module)104   void rt_hw_disable_module_clock(rt_uint8_t module)
105  {
106 
107  }
108 
109