Searched refs:rt_ioremap (Results 1 – 6 of 6) sorted by relevance
| /libcpu/arm/cortex-a/ |
| A D | interrupt.c | 73 gic_dist_base = (uint32_t)rt_ioremap((void*)platform_get_gic_dist_base(), 0x2000); in rt_hw_interrupt_init()
74 gic_cpu_base = (uint32_t)rt_ioremap((void*)platform_get_gic_cpu_base(), 0x1000); in rt_hw_interrupt_init()
103 gic_dist_base = (uint32_t)rt_ioremap((void*)platform_get_gic_dist_base(), 0x10000); in rt_hw_interrupt_init()
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| /libcpu/risc-v/virt64/ |
| A D | plic.c | 26 #define rt_ioremap(addr, ...) (addr) macro
131 plic_base = (size_t)rt_ioremap((void *)plic_base, 64 * 1024 * 1024); in plic_init()
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| /libcpu/risc-v/t-head/c906/ |
| A D | plic.c | 47 c906_irq_priority[hwirq] = (void *)rt_ioremap(priority_addr, 0x1000); in plic_irq_toggle()
206 handler->hart_base = (void *)rt_ioremap(handler->hart_base, 0x1000); in plic_init()
207 handler->enable_base = (void *)rt_ioremap(handler->enable_base, 0x1000); in plic_init()
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| /libcpu/risc-v/t-head/c908/ |
| A D | plic.c | 47 plic_irq_priority[hwirq] = (void *)rt_ioremap(priority_addr, 0x1000); in plic_irq_toggle()
206 handler->hart_base = (void *)rt_ioremap(handler->hart_base, 0x1000); in plic_init()
207 handler->enable_base = (void *)rt_ioremap(handler->enable_base, 0x1000); in plic_init()
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| /libcpu/aarch64/common/ |
| A D | cpu_spin_table.c | 42 cpu_release_vaddr = rt_ioremap((void *)cpu_release_addr[cpuid], sizeof(cpu_release_addr[0])); in spin_table_cpu_boot()
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| A D | interrupt.c | 97 gic_dist_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_dist_base(), 0x40000); in rt_hw_interrupt_init()
98 gic_cpu_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_cpu_base(), 0x1000); in rt_hw_interrupt_init()
100 gic_rdist_base = (rt_uint64_t)rt_ioremap((void*)platform_get_gic_redist_base(), in rt_hw_interrupt_init()
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