| /libcpu/mips/common/ |
| A D | mips_cache.c | 36 if (size > g_mips_core.icache_size) in r4k_icache_flush_range() 45 end = ((addr + size) - 1) & ~(ic_lsize - 1); in r4k_icache_flush_range() 62 end = ((addr + size) - 1) & ~(ic_lsize - 1); in r4k_icache_lock_range() 78 end = ((addr + size) - 1) & ~(dc_lsize - 1); in r4k_dcache_inv() 92 if (size >= g_mips_core.dcache_size) in r4k_dcache_wback_inv() 112 #define dma_cache_wback_inv(start,size) \ argument 114 #define dma_cache_wback(start,size) \ argument 116 #define dma_cache_inv(start,size) \ argument 125 r4k_dcache_wback_inv(addr, size); in r4k_dma_cache_sync() 129 r4k_dcache_wback_inv(addr, size); in r4k_dma_cache_sync() [all …]
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| /libcpu/risc-v/t-head/c908/ |
| A D | cache.c | 80 void rt_hw_cpu_icache_invalidate_local(void *addr, int size) in rt_hw_cpu_icache_invalidate_local() argument 92 void rt_hw_cpu_dcache_clean_local(void *addr, int size) in rt_hw_cpu_dcache_clean_local() argument 104 void rt_hw_cpu_dcachel1_clean_local(void *addr, int size) in rt_hw_cpu_dcachel1_clean_local() argument 116 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument 120 rt_hw_cpu_icache_invalidate(addr, size); in rt_hw_cpu_icache_ops() 124 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument 128 rt_hw_cpu_dcache_clean(addr, size); in rt_hw_cpu_dcache_ops() 132 rt_hw_cpu_dcache_invalidate(addr, size); in rt_hw_cpu_dcache_ops() 136 void rt_hw_sync_cache_local(void *addr, int size) in rt_hw_sync_cache_local() argument 138 rt_hw_cpu_dcachel1_clean_local(addr, size); in rt_hw_sync_cache_local() [all …]
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| A D | cache.h | 51 void rt_hw_cpu_dcache_clean_local(void *addr, int size); 52 void rt_hw_cpu_dcache_invalidate_local(void *addr, int size); 53 void rt_hw_cpu_dcache_clean_invalidate_local(void *addr, int size); 55 void rt_hw_cpu_icache_invalidate_local(void *addr, int size); 96 void rt_hw_cpu_dcache_clean(void *addr, int size); 97 void rt_hw_cpu_dcache_invalidate(void *addr, int size); 98 void rt_hw_cpu_dcache_clean_invalidate(void *addr, int size); 104 void rt_hw_cpu_icache_invalidate(void *addr, int size); 125 void rt_hw_sync_cache_local(void *addr, int size);
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| /libcpu/aarch64/common/ |
| A D | cache_ops.c | 31 void rt_hw_cpu_icache_invalidate(void *addr, rt_size_t size) in rt_hw_cpu_icache_invalidate() argument 36 void rt_hw_cpu_dcache_invalidate(void *addr, rt_size_t size) in rt_hw_cpu_dcache_invalidate() argument 41 void rt_hw_cpu_dcache_clean(void *addr, rt_size_t size) in rt_hw_cpu_dcache_clean() argument 43 __asm_flush_dcache_range((rt_size_t)addr, (rt_size_t)addr + size); in rt_hw_cpu_dcache_clean() 46 void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, rt_size_t size) in rt_hw_cpu_dcache_clean_and_invalidate() argument 48 __asm_flush_dcache_range((rt_size_t)addr, (rt_size_t)addr + size); in rt_hw_cpu_dcache_clean_and_invalidate() 51 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument 55 rt_hw_cpu_icache_invalidate(addr, size); in rt_hw_cpu_icache_ops() 59 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument 63 rt_hw_cpu_dcache_clean(addr, size); in rt_hw_cpu_dcache_ops() [all …]
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| /libcpu/risc-v/t-head/c906/ |
| A D | cache.c | 75 void rt_hw_cpu_icache_invalidate_local(void *addr, int size) in rt_hw_cpu_icache_invalidate_local() argument 81 void rt_hw_cpu_dcache_invalidate_local(void *addr, int size) in rt_hw_cpu_dcache_invalidate_local() argument 87 void rt_hw_cpu_dcache_clean_local(void *addr, int size) in rt_hw_cpu_dcache_clean_local() argument 105 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument 109 rt_hw_cpu_icache_invalidate_local(addr, size); in rt_hw_cpu_icache_ops() 113 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument 117 rt_hw_cpu_dcache_clean_local(addr, size); in rt_hw_cpu_dcache_ops() 121 rt_hw_cpu_dcache_invalidate_local(addr, size); in rt_hw_cpu_dcache_ops() 125 void rt_hw_sync_cache_local(void *addr, int size) in rt_hw_sync_cache_local() argument 127 rt_hw_cpu_dcache_clean_local(addr, size); in rt_hw_sync_cache_local() [all …]
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| A D | cache.h | 32 void rt_hw_cpu_dcache_clean_local(void *addr, int size); 33 void rt_hw_cpu_dcache_invalidate_local(void *addr, int size); 34 void rt_hw_cpu_dcache_clean_and_invalidate_local(void *addr, int size); 36 void rt_hw_cpu_icache_invalidate_local(void *addr, int size); 77 void rt_hw_cpu_dcache_clean(void *addr, int size); 78 void rt_hw_cpu_dcache_invalidate(void *addr, int size); 79 void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, int size); 85 void rt_hw_cpu_icache_invalidate(void *addr, int size); 106 void rt_hw_sync_cache_local(void *addr, int size);
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| /libcpu/mips/gs264/ |
| A D | cache.c | 27 void rt_hw_cpu_icache_invalidate(void *addr, int size) in rt_hw_cpu_icache_invalidate() argument 31 rt_uint64_t end_addr = (rt_uint64_t) addr + size + line_size - 1; in rt_hw_cpu_icache_invalidate() 34 void rt_hw_cpu_dcache_invalidate(void *addr, int size) in rt_hw_cpu_dcache_invalidate() argument 38 rt_uint64_t end_addr = (rt_uint64_t) addr + size + line_size - 1; in rt_hw_cpu_dcache_invalidate() 41 void rt_hw_cpu_dcache_clean(void *addr, int size) in rt_hw_cpu_dcache_clean() argument 45 rt_uint64_t end_addr = (rt_uint64_t) addr + size + line_size - 1; in rt_hw_cpu_dcache_clean() 48 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument 51 rt_hw_cpu_icache_invalidate(addr, size); in rt_hw_cpu_icache_ops() 54 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument 57 rt_hw_cpu_dcache_clean(addr, size); in rt_hw_cpu_dcache_ops() [all …]
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| A D | mmu.c | 171 void rt_hw_cpu_dcache_clean(void *addr, int size); 175 for(; size > 0; size--) in rt_hw_init_mmu_table() 220 va_e = (size_t)v_address + size - 1; in rt_hw_mmu_map_init() 491 if (!size) in _rt_hw_mmu_map() 496 pa_e = (size_t)p_addr + size - 1; in _rt_hw_mmu_map() 537 pa_e = (size_t)p_addr + size - 1; in _rt_hw_mmu_map() 639 if (!size) in _rt_hw_mmu_map_auto() 644 size += (offset + ARCH_PAGE_SIZE - 1); in _rt_hw_mmu_map_auto() 645 pages = (size >> ARCH_PAGE_SHIFT); in _rt_hw_mmu_map_auto() 677 va_e = (size_t)v_addr + size - 1; in _rt_hw_mmu_unmap() [all …]
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| A D | mmu.h | 100 int rt_hw_mmu_map_init(rt_mmu_info *mmu_info, void* v_address, size_t size, size_t *vtable, size_t … 102 void *rt_hw_mmu_map(rt_mmu_info *mmu_info, void *v_addr, void* p_addr, size_t size, size_t attr); 103 void *rt_hw_mmu_map_auto(rt_mmu_info *mmu_info, void *v_addr, size_t size, size_t attr); 105 void *rt_hw_mmu_map(rt_mmu_info *mmu_info, void* p_addr, size_t size, size_t attr); 107 void rt_hw_mmu_unmap(rt_mmu_info *mmu_info, void* v_addr, size_t size); 110 void *rt_hw_kernel_phys_to_virt(void *p_addr, size_t size); 111 void *rt_hw_kernel_virt_to_phys(void *v_addr, size_t size);
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| /libcpu/risc-v/virt64/ |
| A D | cache.h | 20 rt_always_inline void rt_hw_cpu_dcache_clean_local(void *addr, int size) in rt_hw_cpu_dcache_clean_local() argument 23 RT_UNUSED(size); in rt_hw_cpu_dcache_clean_local() 26 rt_always_inline void rt_hw_cpu_dcache_invalidate_local(void *addr, int size) in rt_hw_cpu_dcache_invalidate_local() argument 29 RT_UNUSED(size); in rt_hw_cpu_dcache_invalidate_local() 32 rt_always_inline void rt_hw_cpu_dcache_clean_and_invalidate_local(void *addr, int size) in rt_hw_cpu_dcache_clean_and_invalidate_local() argument 35 RT_UNUSED(size); in rt_hw_cpu_dcache_clean_and_invalidate_local() 50 rt_always_inline void rt_hw_cpu_icache_invalidate_local(void *addr, int size) in rt_hw_cpu_icache_invalidate_local() argument 53 RT_UNUSED(size); in rt_hw_cpu_icache_invalidate_local() 86 void rt_hw_sync_cache_local(void *addr, int size);
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| A D | cache.c | 27 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument 31 rt_hw_cpu_icache_invalidate(addr, size); in rt_hw_cpu_icache_ops() 35 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument 39 rt_hw_cpu_dcache_clean(addr, size); in rt_hw_cpu_dcache_ops() 43 rt_hw_cpu_dcache_invalidate(addr, size); in rt_hw_cpu_dcache_ops() 57 void rt_hw_sync_cache_local(void *addr, int size) in rt_hw_sync_cache_local() argument
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| /libcpu/arm/cortex-a/ |
| A D | cache.c | 27 void rt_hw_cpu_icache_invalidate(void *addr, int size) in rt_hw_cpu_icache_invalidate() argument 44 void rt_hw_cpu_dcache_invalidate(void *addr, int size) in rt_hw_cpu_dcache_invalidate() argument 61 void rt_hw_cpu_dcache_inv_range(void *addr, int size) in rt_hw_cpu_dcache_inv_range() argument 65 rt_uint32_t end_addr = (rt_uint32_t)addr + size; in rt_hw_cpu_dcache_inv_range() 92 void rt_hw_cpu_dcache_clean(void *addr, int size) in rt_hw_cpu_dcache_clean() argument 109 void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, int size) in rt_hw_cpu_dcache_clean_and_invalidate() argument 127 void rt_hw_cpu_icache_ops(int ops, void *addr, int size) in rt_hw_cpu_icache_ops() argument 131 rt_hw_cpu_icache_invalidate(addr, size); in rt_hw_cpu_icache_ops() 135 void rt_hw_cpu_dcache_ops(int ops, void *addr, int size) in rt_hw_cpu_dcache_ops() argument 139 rt_hw_cpu_dcache_clean(addr, size); in rt_hw_cpu_dcache_ops() [all …]
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| A D | mmu.c | 91 num_section = size >> ARCH_SECTION_SHIFT; in _init_map_section() 103 rt_uint32_t size = 0; in rt_hw_mem_setup_early() local 106 size &= ~(0x100000 - 1); in rt_hw_mem_setup_early() 108 size -= KERNEL_VADDR_START; in rt_hw_mem_setup_early() 116 size -= va; in rt_hw_mem_setup_early() 134 for(; size > 0; size--) in rt_hw_init_mmu_table() 181 va_e = (size_t)v_address + size - 1; in rt_hw_mmu_map_init() 208 rt_ioremap_size = size; in rt_hw_mmu_map_init() 236 if (size & ARCH_SECTION_MASK) in rt_hw_mmu_ioremap_init() 242 sections = (size >> ARCH_SECTION_SHIFT); in rt_hw_mmu_ioremap_init() [all …]
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| A D | cache.h | 14 void rt_hw_cpu_icache_invalidate(void *addr, int size); 15 void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, int size);
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| /libcpu/aarch64/common/include/ |
| A D | cache.h | 20 void rt_hw_dcache_flush_range(unsigned long start_addr, unsigned long size); 21 void rt_hw_cpu_dcache_clean(void *addr, unsigned long size); 22 void rt_hw_cpu_dcache_invalidate(void *start_addr, unsigned long size); 36 void rt_hw_cpu_icache_invalidate(void *addr, rt_size_t size); 37 void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, rt_size_t size);
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| /libcpu/arm/common/ |
| A D | showmem.c | 13 void rt_hw_show_memory(rt_uint32_t addr, rt_size_t size) in rt_hw_show_memory() argument 20 size = 4 * ((size + 3) / 4); in rt_hw_show_memory() 22 while (i < size) in rt_hw_show_memory()
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| /libcpu/arm/dm36x/ |
| A D | mmu.c | 154 while(ptr < buffer + size) in mmu_clean_invalidated_dcache() 164 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache() argument 170 while (ptr < buffer + size) in mmu_clean_dcache() 186 while (ptr < buffer + size) in mmu_invalidate_dcache() 373 while(ptr < buffer + size) in mmu_clean_invalidated_dcache() 381 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache() argument 387 while (ptr < buffer + size) in mmu_clean_dcache() 400 while (ptr < buffer + size) in mmu_invalidate_dcache() 486 for (; size > 0; size--) in build_pte_mem_desc() 515 build_pte_mem_desc(mdesc, size); in rt_hw_mmu_init() [all …]
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| /libcpu/arm/armv6/ |
| A D | mmu.c | 154 while(ptr < buffer + size) in mmu_clean_invalidated_dcache() 164 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache() argument 170 while (ptr < buffer + size) in mmu_clean_dcache() 186 while (ptr < buffer + size) in mmu_invalidate_dcache() 373 while(ptr < buffer + size) in mmu_clean_invalidated_dcache() 381 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache() argument 387 while (ptr < buffer + size) in mmu_clean_dcache() 400 while (ptr < buffer + size) in mmu_invalidate_dcache() 487 for (; size > 0; size--) in build_pte_mem_desc() 517 build_pte_mem_desc(mdesc, size); in rt_hw_mmu_init() [all …]
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| /libcpu/arm/arm926/ |
| A D | mmu.c | 143 while (ptr < buffer + size) in mmu_clean_invalidated_dcache() 150 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache() argument 156 while (ptr < buffer + size) in mmu_clean_dcache() 163 void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_invalidate_dcache() argument 169 while (ptr < buffer + size) in mmu_invalidate_dcache() 333 while (ptr < buffer + size) in mmu_clean_invalidated_dcache() 342 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size) in mmu_clean_dcache() argument 348 while (ptr < buffer + size) in mmu_clean_dcache() 362 while (ptr < buffer + size) in mmu_invalidate_dcache() 413 void rt_hw_mmu_init(struct mem_desc *mdesc, rt_uint32_t size) in rt_hw_mmu_init() argument [all …]
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| A D | mmu.h | 48 void rt_hw_mmu_init(struct mem_desc *mdesc, rt_uint32_t size); 49 void mmu_clean_invalidated_dcache(rt_uint32_t buffer, rt_uint32_t size); 50 void mmu_clean_dcache(rt_uint32_t buffer, rt_uint32_t size); 51 void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size);
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| /libcpu/arm/zynqmp-r5/ |
| A D | xil_mpu.c | 87 u64 size; member 155 u32 Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib) in Xil_SetMPURegion() argument 176 if (size <= region_size[i].size) { in Xil_SetMPURegion() 182 Localaddr &= ~(region_size[i].size - 1); in Xil_SetMPURegion() 317 u32 Tempsize = size; in Xil_UpdateMPUConfig() 326 if (size & REGION_EN) { in Xil_UpdateMPUConfig() 500 if (size <= region_size[Index].size) { in Xil_SetMPURegionByRegNum() 506 Localaddr &= ~(region_size[Index].size - 1); in Xil_SetMPURegionByRegNum() 619 UINTPTR Basephysaddr = 0, end = Physaddr + size; in Xil_MemMap() 623 if (u32overflow(Physaddr, size)) in Xil_MemMap() [all …]
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| A D | xil_mpu.h | 112 u32 Xil_SetMPURegion(INTPTR addr, u64 size, u32 attrib); 113 u32 Xil_UpdateMPUConfig(u32 reg_num, INTPTR address, u32 size, u32 attrib); 119 u32 Xil_SetMPURegionByRegNum (u32 reg_num, INTPTR addr, u64 size, u32 attrib); 120 void* Xil_MemMap(UINTPTR Physaddr, size_t size, u32 flags);
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| A D | mpu.c | 49 u64 size; member 112 u64 size; in Init_MPU() local 119 size = (XPAR_PSU_R5_DDR_0_S_AXI_HIGHADDR - XPAR_PSU_R5_DDR_0_S_AXI_BASEADDR) + 1; in Init_MPU() 120 if (size < 0x80000000) { in Init_MPU() 123 if (size <= region_size[i].size) { in Init_MPU() 129 if (region_size[i].size > (size + Offset + 1)) { in Init_MPU() 134 … region_size[i].size - 1, ((u32)XPAR_PSU_R5_DDR_0_S_AXI_HIGHADDR + 1)); in Init_MPU()
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| /libcpu/arm/cortex-m7/ |
| A D | cpu_cache.c | 37 void rt_hw_cpu_icache_ops(int ops, void* addr, int size) in rt_hw_cpu_icache_ops() argument 40 rt_int32_t size_byte = size + address - (rt_uint32_t)addr; in rt_hw_cpu_icache_ops() 71 void rt_hw_cpu_dcache_ops(int ops, void* addr, int size) in rt_hw_cpu_dcache_ops() argument 74 rt_uint32_t size_byte = size + (rt_uint32_t)addr - startAddr; in rt_hw_cpu_dcache_ops()
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| /libcpu/xilinx/microblaze/ |
| A D | serial.c | 147 static rt_ssize_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) in rt_serial_read() argument 158 while (size) in rt_serial_read() 185 ptr ++; size --; in rt_serial_read() 198 while (size) in rt_serial_read() 206 size --; in rt_serial_read() 215 …atic rt_ssize_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) in rt_serial_write() argument 227 while (size) in rt_serial_write() 245 ptr ++; size --; in rt_serial_write() 250 while (size) in rt_serial_write() 261 ptr ++; size --; in rt_serial_write()
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