| /libcpu/aarch64/common/include/ |
| A D | asm-fpu.h | 15 str q0, [\reg, #-0x10]!
16 str q1, [\reg, #-0x10]!
17 str q2, [\reg, #-0x10]!
18 str q3, [\reg, #-0x10]!
19 str q4, [\reg, #-0x10]!
20 str q5, [\reg, #-0x10]!
21 str q6, [\reg, #-0x10]!
22 str q7, [\reg, #-0x10]!
23 str q8, [\reg, #-0x10]!
24 str q9, [\reg, #-0x10]!
[all …]
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| /libcpu/arm/s3c44b0/ |
| A D | serial.c | 18 void rt_console_puts(const char* str);
49 void rt_console_puts(const char* str) in rt_console_puts() argument
51 while (*str) in rt_console_puts()
53 rt_serial_putc (*str++); in rt_console_puts()
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| A D | context_gcc.S | 51 str sp, [r0] @ store sp in preempted tasks TCB
89 str r3, [r2]
91 str r0, [r2]
94 str r1, [r2]
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| A D | start_gcc.S | 79 str r1,[r0]
84 str r1,[r0]
88 str r0, [r1]
165 str r1, [r0]
240 str r0, [r1] @ r0->[r1]
247 str r0, [r1] @ r0->[r1]
251 str r0, [r1] @ r0->[r1]
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| /libcpu/aarch64/common/up/ |
| A D | context_gcc.S | 62 str x2, [x0] // store sp in preempted tasks TCB
84 str x0, [x4]
88 str x7, [x6]
98 str x1, [x6]
113 str x0, [x4] // store sp in preempted tasks's tcb
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| A D | vector_gcc.S | 56 str x2, [x1]
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| /libcpu/arm/lpc214x/ |
| A D | startup_gcc.S | 82 str r3, [r0, #PLLCFG_OFS]
84 str r3, [r0, #PLLCON_OFS]
85 str r1, [r0, #PLLFEED_OFS]
86 str r2, [r0, #PLLFEED_OFS]
96 str r3, [r0, #PLLCON_OFS]
97 str r1, [r0, #PLLFEED_OFS]
98 str R2, [r0, #PLLFEED_OFS]
104 str r1, [r0]
110 str r1, [r0, #MAMTIM_OFS]
112 str r1, [r0, #MAMCR_OFS]
[all …]
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| /libcpu/arm/AT91SAM7S/ |
| A D | context_gcc.S | 46 str sp, [r0] /* store sp in preempted tasks TCB */
84 str r3, [r2]
86 str r0, [r2]
89 str r1, [r2]
|
| A D | start_gcc.S | 72 str r1, [r0, #0x04]
77 str r1, [r0, #0x20]
87 str r1, [r0, #0x2C]
97 str r1, [r0, #0x30]
141 str r1, [r0]
147 str r0, [r1]
195 str r1, [r0]
222 str sp, [r5] /* store sp in preempted tasks's TCB */
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| /libcpu/arm/cortex-a/ |
| A D | context_gcc.S | 163 str r0, [r1]
190 str r0, [r3]
192 str r3, [ip]
201 str r1, [ip]
210 str r0, [r3]
212 str r3, [ip]
215 str r1, [ip]
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| /libcpu/arm/s3c24x0/ |
| A D | start_gcc.S | 176 str r1,[r0]
181 str r0, [r1]
184 str r0, [r1]
254 str lr, [r8, #0] /* Save calling PC */
256 str r6, [r8, #4] /* Save CPSR */
257 str r0, [r8, #8] /* Save OLD_R0 */
276 str lr, [r8, #0] /* Save calling PC */
278 str r6, [r8, #4] /* Save CPSR */
279 str r0, [r8, #8] /* Save OLD_R0 */
317 str r1, [r0]
[all …]
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| A D | context_gcc.S | 51 str sp, [r0] @ store sp in preempted tasks TCB
89 str r3, [r2]
91 str r0, [r2]
94 str r1, [r2]
|
| /libcpu/arm/lpc24xx/ |
| A D | context_gcc.S | 51 str sp, [r0] @ store sp in preempted tasks TCB
89 str r3, [r2]
91 str r0, [r2]
94 str r1, [r2]
|
| A D | start_gcc.S | 107 str r1,[r0]
112 str r1,[r0]
116 str r0, [r1]
120 str r0, [r1]
131 str r0, [r3]
217 str r1, [r0]
244 str sp, [r5] /* store sp in preempted tasks's TCB */
|
| /libcpu/arm/AT91SAM7X/ |
| A D | context_gcc.S | 51 str sp, [r0] @ store sp in preempted tasks TCB
89 str r3, [r2]
91 str r0, [r2]
94 str r1, [r2]
|
| A D | start_gcc.S | 72 str r1, [r0, #0x04]
77 str r1, [r0, #0x20]
87 str r1, [r0, #0x2C]
97 str r1, [r0, #0x30]
149 str r0, [r1]
157 str r0, [r3]
237 str r1, [r0]
|
| /libcpu/arm/arm926/ |
| A D | context_rvds.S | 49 str sp, [r0] ; store sp in preempted tasks tcb
82 str r3, [r2]
84 str r0, [r2]
87 str r1, [r2]
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| A D | start_gcc.S | 242 str r1, [r0]
260 str sp, [r5]
277 str lr, [r0, #15*4]
278 str r6, [r0, #16*4]
279 str sp, [r0, #13*4]
280 str lr, [r0, #14*4]
|
| /libcpu/arm/am335x/ |
| A D | start_gcc.S | 134 str lr, [r8, #0] @/* Save calling PC */
136 str r6, [r8, #4] @/* Save CPSR */
137 str r0, [r8, #8] @/* Save OLD_R0 */
165 str lr, [r8, #0] @/* Save calling PC */
167 str r6, [r8, #4] @/* Save CPSR */
168 str r0, [r8, #8] @/* Save OLD_R0 */
243 str sp, [r5] @ store sp in preempted tasks's TCB
|
| /libcpu/arm/cortex-r4/ |
| A D | start_gcc.S | 136 str r0, [r3]
382 str r2, [r0] @ clear the ESMSR1 register
386 str r2, [r0] @ clear the ESMSR2 register
390 str r2, [r0] @ clear the ESMSSR2 register
394 str r2, [r0] @ clear the ESMKEY register
398 str r2, [r0] @ clear the INTREQ register
401 str r2, [r0] @ clear the CCMR4 status register
475 str lr, [r0, #15*4] @/* Push PC */
476 str r6, [r0, #16*4] @/* Push CPSR */
478 str sp, [r0, #13*4] @/* Save calling SP */
[all …]
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| A D | start_ccs.asm | 398 str r2, [r0] ; clear the ESMSR1 register
402 str r2, [r0] ; clear the ESMSR2 register
406 str r2, [r0] ; clear the ESMSSR2 register
410 str r2, [r0] ; clear the ESMKEY register
414 str r2, [r0] ; clear the INTREQ register
417 str r2, [r0] ; clear the CCMR4 status register
500 str lr, [r0, #15*4] ;/* Push PC */
501 str r6, [r0, #16*4] ;/* Push CPSR */
503 str sp, [r0, #13*4] ;/* Save calling SP */
504 str lr, [r0, #14*4] ;/* Save calling PC */
|
| /libcpu/arm/cortex-r52/ |
| A D | start_gcc.S | 134 str r0, [r3]
380 str r2, [r0] @ clear the ESMSR1 register
384 str r2, [r0] @ clear the ESMSR2 register
388 str r2, [r0] @ clear the ESMSSR2 register
392 str r2, [r0] @ clear the ESMKEY register
396 str r2, [r0] @ clear the INTREQ register
399 str r2, [r0] @ clear the CCMR4 status register
473 str lr, [r0, #15*4] @/* Push PC */
474 str r6, [r0, #16*4] @/* Push CPSR */
476 str sp, [r0, #13*4] @/* Save calling SP */
[all …]
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| /libcpu/risc-v/common64/ |
| A D | sbi.c | 258 void rt_hw_console_output(const char *str) in rt_hw_console_output() argument
260 while (*str) in rt_hw_console_output()
262 sbi_console_putchar(*str++); in rt_hw_console_output()
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| /libcpu/arm/zynqmp-r5/ |
| A D | start_gcc.S | 165 str r1, [r0]
171 str r2, [r0]
208 str r1, [r0]
364 str sp, [r5] @ store sp in preempted tasks's TCB
388 str lr, [r0, #15*4] @/* Push PC */
389 str r6, [r0, #16*4] @/* Push CPSR */
391 str sp, [r0, #13*4] @/* Save calling SP */
392 str lr, [r0, #14*4] @/* Save calling PC */
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| /libcpu/aarch64/common/mp/ |
| A D | context_gcc.S | 69 str x3, [x0] // store sp in preempted tasks TCB
125 str x0, [FROM_SPP]
|