Searched refs:t2 (Results 1 – 10 of 10) sorted by relevance
| /libcpu/risc-v/common64/ |
| A D | stackframe.h | 208 FLOAD f0, FPU_CTX_F0_OFF(t2)
209 FLOAD f1, FPU_CTX_F1_OFF(t2)
210 FLOAD f2, FPU_CTX_F2_OFF(t2)
211 FLOAD f3, FPU_CTX_F3_OFF(t2)
212 FLOAD f4, FPU_CTX_F4_OFF(t2)
213 FLOAD f5, FPU_CTX_F5_OFF(t2)
214 FLOAD f6, FPU_CTX_F6_OFF(t2)
215 FLOAD f7, FPU_CTX_F7_OFF(t2)
216 FLOAD f8, FPU_CTX_F8_OFF(t2)
217 FLOAD f9, FPU_CTX_F9_OFF(t2)
[all …]
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| A D | stack.h | 35 rt_ubase_t t2; /* x7 - t2 - temporary register 2 */ member
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| A D | trap.c | 43 rt_kprintf("\tt2(x7) = %p\n", regs->t2); in dump_regs()
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| /libcpu/risc-v/vector/rvv-1.0/ |
| A D | rvv_context.h | 66 VEC_CONFIG_SETVLI(t2, x0, VEC_IMM_SEW_8, VEC_IMM_LMUL_8)
69 add t1, t1, t2
71 add t1, t1, t2
73 add t1, t1, t2
88 VEC_CONFIG_SETVLI(t2, x0, VEC_IMM_SEW_8, VEC_IMM_LMUL_8)
91 add t1, t1, t2
93 add t1, t1, t2
95 add t1, t1, t2
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| /libcpu/mips/common/ |
| A D | mips.inc | 24 #define t2 $10
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| A D | mips_regs.h | 31 #define t2 $10 macro
80 #define t2 $14 macro
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| /libcpu/risc-v/common/ |
| A D | rt_hw_stack_frame.h | 25 rt_ubase_t t2; /* x7 - t2 - temporary register 2 */ member
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| A D | trap_common.c | 95 rt_kprintf("t2 : 0x%08x\r\n", s_stack_frame->t2); in rt_show_stack_frame()
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| A D | interrupt_gcc.S | 113 lw t2, 0(t0)
114 beqz t2, 1f
313 li t2, __STACKSIZE__
314 mul t1, t1, t2
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| A D | context_gcc.S | 225 li t2, __STACKSIZE__
226 mul t1, t1, t2
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