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/libcpu/aarch64/
A Dlink.lds.S25 text PT_LOAD FLAGS(5); /* PF_R(4) | PF_X(1) = 0x5 (RX) */
40 .text :
44 KEEP(*(.text.entrypoint)) /* The entry point */ argument
46 *(.text) /* remaining code */
47 *(.text.*) /* remaining code */
99 } :text
/libcpu/ia32/
A Dtrapisr_gcc.S28 .text
37 .text
44 .text
A Dhdisr_gcc.S27 .text
34 .text
/libcpu/aarch64/common/
A Dstartup_gcc.S15 .text
A Dstack_gcc.S21 .section .text
A Dvector_gcc.S18 .text
/libcpu/arm/realview-a8-vmm/
A Dcontext_gcc.S13 .section .text, "ax"
50 .section .text.isr, "ax"
A Dstart_gcc.S46 .text
120 .section .text.isr, "ax"
/libcpu/arm/zynqmp-r5/
A Dcontext_gcc.S11 .section .text, "ax"
51 .section .text.isr, "ax"
/libcpu/aarch64/common/mp/
A Dvector_gcc.S18 .section .text
A Dcontext_gcc.S26 .section .text
/libcpu/aarch64/common/up/
A Dvector_gcc.S23 .section .text
A Dcontext_gcc.S37 .section .text
/libcpu/m16c/m16c62p/
A Dcontext_gcc.S13 .section .text
/libcpu/arm/am335x/
A Dcontext_iar.S14 SECTION .text:CODE(6)
/libcpu/arm/cortex-m33/
A Dsyscall_iar.S17 SECTION .text:CODE(2)
A Dsyscall_gcc.S14 .text
A Dsyscall_rvds.S11 AREA |.text|, CODE, READONLY, ALIGN=2
/libcpu/arm/lpc24xx/
A Dcontext_rvds.S14 AREA |.text|, CODE, READONLY, ALIGN=2
/libcpu/arm/cortex-a/
A Dcontext_gcc.S12 .section .text, "ax"
71 .section .text.isr, "ax"
/libcpu/ppc/ppc405/
A Dstart_gcc.S16 #define function_prolog(func_name) .text; \
163 .text
167 .text 2 ; \
169 .text ; \
201 .text
/libcpu/arm/cortex-m4/
A Dcontext_iar.S28 SECTION .text:CODE(2)
41 SECTION .text:CODE:REORDER:NOROOT(2)
51 SECTION .text:CODE:REORDER:NOROOT(2)
/libcpu/xilinx/microblaze/
A Dcontext_gcc.S13 .text
144 .section .text
/libcpu/avr32/uc3/
A Dcontext_gcc.S14 .text
/libcpu/arm/arm926/
A Dcontext_gcc.S13 .text

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