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Searched refs:v0 (Results 1 – 6 of 6) sorted by relevance

/libcpu/mips/gs232/
A Dcache_gcc.S83 #a3, v0 and v1 used as local registers
85 addu v0, $0, a0
87 1: slt a3, v0, v1
96 cache Index_Store_Tag_D, 0x3(v0)
98 addiu v0, v0, 0x20
101 addu v0, $0, a0
103 1: slt a3, v0, v1
113 addiu v0, v0, 0x20
116 addu v0, $0, a0
118 1: slt a3, v0, v1
[all …]
/libcpu/mips/pic32/
A Dcontext_gcc.S29 mfc0 v0, CP0_STATUS /* v0 = status */
31 and v1, v0, v1 /* v1 = v0 & 0xFFFFFFFE */
/libcpu/risc-v/vector/rvv-1.0/
A Drvv_context.h68 vse8.v v0, (t1)
90 vle8.v v0, (t1)
/libcpu/mips/common/
A Dstackframe.h205 LONG_L v0, PT_STATUS(sp)
207 and v0, v1
208 or v0, a0
210 or v0, v1
211 mtc0 v0, CP0_STATUS
A Dmips.inc16 #define v0 $2 /* return value */
A Dmips_regs.h23 #define v0 $2 /* return value */ macro
64 #define v0 $2 /* return value - caller saved */ macro

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