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Searched refs:x18 (Results 1 – 10 of 10) sorted by relevance

/libcpu/risc-v/rv64/
A Dtrap.c35 uint64_t x18; member
73 …18(s2 : Save register ) ==> 0x%08x%08x\n", esf->x18 >> 32 , esf->x18 & UINT32_MA… in print_stack_frame()
/libcpu/aarch64/common/include/
A Dvector_gcc.h33 stp x18, x19, [sp, #-0x10]!
73 ldp x18, x19, [sp], #0x10
A Darmv8.h124 rt_uint64_t x18; member
/libcpu/aarch64/common/mp/
A Dcontext_gcc.h43 ldp x18, x19, [sp], #0x10
/libcpu/risc-v/common64/
A Dstartup_gcc.S62 li x18,0
A Dstackframe.h103 STORE x18, 18 * REGBYTES(sp)
278 LOAD x18, 18 * REGBYTES(sp)
/libcpu/risc-v/common/
A Dinterrupt_gcc.S85 STORE x18, 18 * REGBYTES(sp)
156 LOAD x18, 18 * REGBYTES(sp)
287 STORE x18, 18 * REGBYTES(sp)
A Dcontext_gcc.S164 STORE x18, 18 * REGBYTES(sp)
262 LOAD x18, 18 * REGBYTES(sp)
/libcpu/xilinx/microblaze/
A Dmicroblaze.inc17 .equ STACK_R07, 0x18
/libcpu/aarch64/common/
A Dtrap.c160 ….16p X19:0x%16.16p\n", (void *)regs->x16, (void *)regs->x17, (void *)regs->x18, (void *)regs->x19); in rt_hw_show_register()

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