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Searched refs:x19 (Results 1 – 15 of 15) sorted by relevance

/libcpu/aarch64/common/include/
A Dcontext_gcc.h19 stp x19, x20, [sp, #-0x10]!
43 mov x19, #((3 << 6) | 0x4 | 0x1) /* el1h, disable interrupt */
44 stp lr, x19, [sp, #-0x10]!
49 ldp x30, x19, [sp], #0x10 /* SPSR and ELR. */
51 msr spsr_el1, x19
55 ldp x19, x20, [sp], #0x10
56 msr fpcr, x19
59 ldp x29, x19, [sp], #0x10
60 msr sp_el0, x19
65 ldp x19, x20, [sp], #0x10
A Dvector_gcc.h33 stp x18, x19, [sp, #-0x10]!
73 ldp x18, x19, [sp], #0x10
A Darmv8.h125 rt_uint64_t x19; member
/libcpu/aarch64/common/mp/
A Dcontext_gcc.S47 mov x19, x1
49 mov x0, x19
52 mov x0, x19
67 SAVE_CONTEXT_SWITCH x19, x20
75 mov x19, x2
77 mov x0, x19
80 mov x0, x19
88 #define EXP_FRAME x19
A Dcontext_gcc.h43 ldp x18, x19, [sp], #0x10
/libcpu/aarch64/common/
A Dstack_gcc.S25 blr x19
A Dvector_gcc.S70 #define EFRAMEX x19
A Dtrap.c160 ….16p X19:0x%16.16p\n", (void *)regs->x16, (void *)regs->x17, (void *)regs->x18, (void *)regs->x19); in rt_hw_show_register()
/libcpu/aarch64/common/up/
A Dcontext_gcc.h26 mov x19, x0
28 mov x0, x19
A Dcontext_gcc.S59 SAVE_CONTEXT_SWITCH x19, x20
/libcpu/risc-v/rv64/
A Dtrap.c36 uint64_t x19; member
74 …19(s3 : Save register ) ==> 0x%08x%08x\n", esf->x19 >> 32 , esf->x19 & UINT32_MA… in print_stack_frame()
/libcpu/risc-v/common64/
A Dstartup_gcc.S63 li x19,0
A Dstackframe.h104 STORE x19, 19 * REGBYTES(sp)
279 LOAD x19, 19 * REGBYTES(sp)
/libcpu/risc-v/common/
A Dinterrupt_gcc.S86 STORE x19, 19 * REGBYTES(sp)
157 LOAD x19, 19 * REGBYTES(sp)
288 STORE x19, 19 * REGBYTES(sp)
A Dcontext_gcc.S165 STORE x19, 19 * REGBYTES(sp)
263 LOAD x19, 19 * REGBYTES(sp)

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