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Searched refs:x2 (Results 1 – 13 of 13) sorted by relevance

/libcpu/aarch64/common/
A Dcache.S27 add x2, x2, #4 /* x2 <- log2(cache line size) */
44 lsl x7, x4, x2
124 mov x2, #4
125 lsl x2, x2, x3 /* cache line size */
128 sub x3, x2, #1
132 add x0, x0, x2
150 mov x2, #4
151 lsl x2, x2, x3 /* cache line size */
154 sub x3, x2, #1
175 mov x2, #4
[all …]
A Dsmccc.S20 stp x2, x3, [x4, #16]
A Dtrap.c156 …x%16.16p X03:0x%16.16p\n", (void *)regs->x0, (void *)regs->x1, (void *)regs->x2, (void *)regs->x3); in rt_hw_show_register()
/libcpu/aarch64/common/up/
A Dvector_gcc.S50 ldr x2, [x1]
51 cmp x2, #1
55 mov x2, #0
56 str x2, [x1]
A Dcontext_gcc.S61 mov x2, sp
62 str x2, [x0] // store sp in preempted tasks TCB
92 mov x0, x2
/libcpu/aarch64/cortex-a/
A Dentry_point.S93 mov boot_arg1, x2
137 get_pvoff x4 x2
138 add x1, x1, x2
139 mov x2, #0
144 add x2, x2, #1 /* Next cpu id inc */
156 sub x0, x2, #1
253 get_phy x2, __bss_end
254 sub x2, x2, x1 /* Get bss size */
258 and x2, x2, x4 /* Mask ~7 */
263 sub x2, x2, #8
[all …]
/libcpu/aarch64/common/include/
A Dvector_gcc.h25 stp x2, x3, [sp, #-0x10]!
46 mrs x2, elr_el1
48 stp x2, x3, [sp, #-0x10]!
58 ldp x2, x3, [sp], #0x10
59 msr elr_el1, x2
81 ldp x2, x3, [sp], #0x10
A Dhypercall.h21 rt_inline rt_uint32_t rt_hw_hypercall(rt_uint32_t w0, rt_uint64_t x1, rt_uint64_t x2, in rt_hw_hypercall() argument
26 arm_smccc_hvc(w0, x1, x2, x3, x4, x5, x6, w7, &res, RT_NULL); in rt_hw_hypercall()
A Darmv8.h140 rt_uint64_t x2; member
/libcpu/aarch64/common/mp/
A Dcontext_gcc.h27 ldp x2, x3, [sp], #0x10 /* SPSR and ELR. */
31 msr elr_el1, x2
51 ldp x2, x3, [sp], #0x10
A Dcontext_gcc.S72 update_tidr x2
75 mov x19, x2
108 mov TO_SPP, x2
/libcpu/risc-v/rv64/
A Dtrap.c19 uint64_t x2; member
57 …x2 (sp : Stack pointer ) ==> 0x%08x%08x\n", esf->x2 >> 32 , esf->x2 & UINT32_MA… in print_stack_frame()
/libcpu/risc-v/common64/
A Dstartup_gcc.S46 li x2, 0

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