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Searched refs:x3 (Results 1 – 14 of 14) sorted by relevance

/libcpu/aarch64/common/
A Dcache.S28 mov x3, #0x3ff
29 and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */
122 lsr x3, x3, #16
123 and x3, x3, #0xf
128 sub x3, x2, #1
129 bic x0, x0, x3
148 lsr x3, x3, #16
149 and x3, x3, #0xf
154 sub x3, x2, #1
155 bic x0, x0, x3
[all …]
A Dsmccc.S20 stp x2, x3, [x4, #16]
A Dcpu_gcc.S284 add x3, sp, 10
285 ldarh w3, [x3]
A Dtrap.c156 …x%16.16p X03:0x%16.16p\n", (void *)regs->x0, (void *)regs->x1, (void *)regs->x2, (void *)regs->x3); in rt_hw_show_register()
/libcpu/aarch64/common/mp/
A Dcontext_gcc.h27 ldp x2, x3, [sp], #0x10 /* SPSR and ELR. */
29 tst x3, #0x1f
30 msr spsr_el1, x3
51 ldp x2, x3, [sp], #0x10
A Dcontext_gcc.S68 mov x3, sp
69 str x3, [x0] // store sp in preempted tasks TCB
109 mov TO_TCB, x3
/libcpu/aarch64/common/up/
A Dcontext_gcc.S110 ldr x3, =rt_interrupt_from_thread
111 ldr x4, [x3]
115 ldr x3, =rt_interrupt_to_thread
116 ldr x4, [x3]
/libcpu/aarch64/common/include/
A Dvector_gcc.h25 stp x2, x3, [sp, #-0x10]!
45 mrs x3, spsr_el1
48 stp x2, x3, [sp, #-0x10]!
58 ldp x2, x3, [sp], #0x10
60 msr spsr_el1, x3
81 ldp x2, x3, [sp], #0x10
A Dhypercall.h22 rt_uint64_t x3, rt_uint64_t x4, rt_uint64_t x5, rt_uint64_t x6, rt_uint32_t w7) in rt_hw_hypercall() argument
26 arm_smccc_hvc(w0, x1, x2, x3, x4, x5, x6, w7, &res, RT_NULL); in rt_hw_hypercall()
A Darmv8.h141 rt_uint64_t x3; member
/libcpu/aarch64/cortex-a/
A Dentry_point.S94 mov boot_arg2, x3
145 ldr x3, [x1], #8
146 cmp x3, #0
148 and x3, x3, x4
149 cmp x3, x0
256 and x3, x2, #7 /* x3 is < 7 */
267 cbz x3, .clean_bss_end
269 sub x3, x3, #1
288 get_pvoff x2 x3
/libcpu/risc-v/rv64/
A Dtrap.c20 uint64_t x3; member
58 …x3 (gp : Global pointer ) ==> 0x%08x%08x\n", esf->x3 >> 32 , esf->x3 & UINT32_MA… in print_stack_frame()
/libcpu/risc-v/common64/
A Dstartup_gcc.S47 li x3, 0
A Dstackframe.h88 STORE x3, 3 * REGBYTES(sp)
263 LOAD x3, 3 * REGBYTES(sp)

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