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Searched refs:x9 (Results 1 – 10 of 10) sorted by relevance

/libcpu/aarch64/common/
A Dcache.S43 orr x9, x12, x7 /* map way and level to cisw value */
45 orr x9, x9, x7 /* map set number to cisw value */
47 dc isw, x9
49 1: dc cisw, x9 /* clean & invalidate by set/way */
A Dtrap.c158 …:0x%16.16p X10:0x%16.16p X11:0x%16.16p\n", (void *)regs->x8, (void *)regs->x9, (void *)regs->x10, … in rt_hw_show_register()
/libcpu/risc-v/rv64/
A Dtrap.c26 uint64_t x9; member
64 …x9 (s1 : Save register ) ==> 0x%08x%08x\n", esf->x9 >> 32 , esf->x9 & UINT32_MA… in print_stack_frame()
/libcpu/aarch64/common/include/
A Dvector_gcc.h28 stp x8, x9, [sp, #-0x10]!
78 ldp x8, x9, [sp], #0x10
A Darmv8.h135 rt_uint64_t x9; member
/libcpu/aarch64/common/mp/
A Dcontext_gcc.h48 ldp x8, x9, [sp], #0x10
/libcpu/risc-v/common64/
A Dstartup_gcc.S53 li x9, 0
A Dstackframe.h94 STORE x9, 9 * REGBYTES(sp)
269 LOAD x9, 9 * REGBYTES(sp)
/libcpu/risc-v/common/
A Dinterrupt_gcc.S75 STORE x9, 9 * REGBYTES(sp)
146 LOAD x9, 9 * REGBYTES(sp)
277 STORE x9, 9 * REGBYTES(sp)
A Dcontext_gcc.S154 STORE x9, 9 * REGBYTES(sp)
252 LOAD x9, 9 * REGBYTES(sp)

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