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Searched defs:bit (Results 1 – 12 of 12) sorted by relevance

/libcpu/arm/am335x/
A Dcpu.c38 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
50 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
70 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
81 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
100 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
113 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
/libcpu/risc-v/common64/
A Driscv.h18 #define __SIZE(bit) (1ULL << (bit)) argument
19 #define __MASK(bit) (__SIZE(bit) - 1ULL) argument
21 #define __UMASK(bit) (~(__MASK(bit))) argument
29 #define __ALIGNUP(value,bit) (((value) + __MASK(bit)) & __UMASK(bit)) argument
30 #define __ALIGNDOWN(value,bit) ((value) & __UMASK(bit)) argument
A Dencoding.h220 #define set_csr(reg, bit) ({ unsigned long __tmp; \ argument
227 #define clear_csr(reg, bit) ({ unsigned long __tmp; \ argument
/libcpu/arm/sep4020/
A Dcpu.c36 rt_inline void cache_enable(rt_uint32_t bit) in cp15_rd()
47 rt_inline void cache_disable(rt_uint32_t bit) in cp15_rd()
72 rt_inline void cache_enable(rt_uint32_t bit) in cp15_rd()
84 rt_inline void cache_disable(rt_uint32_t bit) in cp15_rd()
/libcpu/arm/s3c24x0/
A Dcpu.c32 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
43 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
68 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
80 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
A Ds3c24x0.h562 #define ClearPending(bit) {SRCPND = bit;INTPND = bit;INTPND;} argument
/libcpu/arm/arm926/
A Dcpuport.c30 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
41 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
66 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
78 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
/libcpu/arm/dm36x/
A Dcpuport.c29 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
40 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
65 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
77 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
/libcpu/arm/armv6/
A Dcpuport.c29 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
40 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
67 rt_inline void cache_enable(rt_uint32_t bit) in cache_enable()
79 rt_inline void cache_disable(rt_uint32_t bit) in cache_disable()
/libcpu/risc-v/common/
A Driscv-ops.h26 #define set_csr(reg, bit) ({ unsigned long __tmp; \ argument
33 #define clear_csr(reg, bit) ({ unsigned long __tmp; \ argument
/libcpu/ppc/ppc405/include/asm/
A Dppc4xx.h37 #define PPC_REG_VAL(bit, value) ((value) << ((PPC_REG_BITS - 1) - (bit))) argument
/libcpu/risc-v/rv64/
A Dencoding.h203 #define set_csr(reg, bit) ({ unsigned long __tmp; \ argument
210 #define clear_csr(reg, bit) ({ unsigned long __tmp; \ argument

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