1 /*
2  * Copyright (C) 2019 ETH Zurich, University of Bologna
3  * and GreenWaves Technologies
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at
8  *
9  *     http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  */
17 
18 #ifndef HAL_INCLUDE_HAL_I2C_PERIPH_H_
19 #define HAL_INCLUDE_HAL_I2C_PERIPH_H_
20 
21 #include "hal_udma_core_periph.h"
22 
23 /* ----------------------------------------------------------------------------
24    -- I2C Peripheral Access Layer --
25    ---------------------------------------------------------------------------- */
26 
27 /** I2C_Type Register Layout Typedef */
28 typedef struct i2c
29 {
30 	udma_channel_t rx; /**< UDMA RX channels struct. */
31 	udma_channel_t tx; /**< UDMA RX channels struct. */
32 	udma_channel_t cmd; /**< UDMA RX channels struct. */
33 	volatile uint32_t status; /**< Status register. */
34 	volatile uint32_t setup; /**< Configuration register. */
35 } i2c_t;
36 
37 
38 /* ----------------------------------------------------------------------------
39    -- I2C Register Bitfield Access --
40    ---------------------------------------------------------------------------- */
41 
42 /*! @name STATUS */
43 /* I2C bus busy status flag:
44   - 1'b0: no transfer on-going
45   - 1'b1: transfer on-going */
46 #define I2C_STATUS_BUSY_MASK                                         (0x1)
47 #define I2C_STATUS_BUSY_SHIFT                                        (0)
48 #define I2C_STATUS_BUSY(val)                                         (((uint32_t)(((uint32_t)(val)) << I2C_STATUS_BUSY_SHIFT)) & I2C_STATUS_BUSY_MASK)
49 
50 /* I2C arbitration lost status flag:
51   - 1'b0: no error
52   - 1'b1: arbitration lost error */
53 #define I2C_STATUS_ARB_LOST_MASK                                     (0x2)
54 #define I2C_STATUS_ARB_LOST_SHIFT                                    (1)
55 #define I2C_STATUS_ARB_LOST(val)                                     (((uint32_t)(((uint32_t)(val)) << I2C_STATUS_ARB_LOST_SHIFT)) & I2C_STATUS_ARB_LOST_MASK)
56 
57 
58 /*! @name SETUP */
59 /* Reset command used to abort the on-going transfer and clear busy and arbitration lost status flags. */
60 #define I2C_SETUP_DO_RST_MASK                                        (0x1)
61 #define I2C_SETUP_DO_RST_SHIFT                                       (0)
62 #define I2C_SETUP_DO_RST(val)                                        (((uint32_t)(((uint32_t)(val)) << I2C_SETUP_DO_RST_SHIFT)) & I2C_SETUP_DO_RST_MASK)
63 
64 
65 /*! @name STATUS */
66 typedef union
67 {
68     struct
69     {
70         /* I2C bus busy status flag:
71         - 1'b0: no transfer on-going
72         - 1'b1: transfer on-going */
73         uint32_t busy:1;
74         /* I2C arbitration lost status flag:
75         - 1'b0: no error
76         - 1'b1: arbitration lost error */
77         uint32_t arb_lost:1;
78     } field;
79     uint32_t word;
80 } i2c_status_t;
81 
82 /*! @name SETUP */
83 typedef union
84 {
85     struct
86     {
87         /* Reset command used to abort the on-going transfer and clear busy and arbitration lost status flags. */
88         uint32_t do_rst:1;
89     } field;
90     uint32_t word;
91 } i2c_setup_t;
92 
93 
94 /* ----------------------------------------------------------------------------
95    -- CMD IDs and macros --
96    ---------------------------------------------------------------------------- */
97 #define I2C_CMD_MASK     (0xF0U)
98 #define I2C_CMD_SHIFT    (4U)
99 
100 #define I2C_CMD_START    (((uint32_t)(((uint32_t)(0x0)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0x00
101 #define I2C_CMD_WAIT_EV  (((uint32_t)(((uint32_t)(0x1)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0x10
102 #define I2C_CMD_STOP     (((uint32_t)(((uint32_t)(0x2)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0x20
103 #define I2C_CMD_RD_ACK   (((uint32_t)(((uint32_t)(0x4)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0x40
104 #define I2C_CMD_RD_NACK  (((uint32_t)(((uint32_t)(0x6)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0x60
105 #define I2C_CMD_WR       (((uint32_t)(((uint32_t)(0x8)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0x80
106 #define I2C_CMD_WAIT     (((uint32_t)(((uint32_t)(0xA)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0xA0
107 #define I2C_CMD_RPT      (((uint32_t)(((uint32_t)(0xC)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0xC0
108 #define I2C_CMD_CFG      (((uint32_t)(((uint32_t)(0xE)) << I2C_CMD_SHIFT)) & I2C_CMD_MASK) // 0xE0
109 
110 #endif /* HAL_INCLUDE_HAL_I2C_PERIPH_H_ */
111