1 /* 2 * Allwinner SoCs display driver. 3 * 4 * Copyright (C) 2016 Allwinner. 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without any 8 * warranty of any kind, whether express or implied. 9 */ 10 11 /** 12 *All Winner Tech, All Right Reserved. 2014-2015 Copyright (c) 13 * 14 *File name :de_rtmx.h 15 * 16 *Description :display engine 2.0 realtime 17 * mixer processing base functions implement 18 *History :2014/02/08 iptang v0.1 Initial version 19 * 20 */ 21 22 #ifndef __DE_RTMX_H__ 23 #define __DE_RTMX_H__ 24 25 #include "de_feat.h" 26 #include "../include.h" 27 28 #define max2(s, t) (((s) >= (t)) ? (s) : (t)) 29 #define min2(s, t) (((s) <= (t)) ? (s) : (t)) 30 #define N2_POWER(a, power) (((unsigned long long)a)<<power) 31 32 enum de_color_space { 33 DE_BT601 = 0, 34 DE_BT709 = 1, 35 DE_YCC = 2, 36 DE_ENHANCE = 3, 37 /* DE_VXYCC = 3, */ 38 }; 39 40 enum de_pixel_format { 41 DE_FORMAT_ARGB_8888 = 0x00, 42 /*MSB A-R-G-B LSB */ 43 DE_FORMAT_ABGR_8888 = 0x01, 44 DE_FORMAT_RGBA_8888 = 0x02, 45 DE_FORMAT_BGRA_8888 = 0x03, 46 DE_FORMAT_XRGB_8888 = 0x04, 47 DE_FORMAT_XBGR_8888 = 0x05, 48 DE_FORMAT_RGBX_8888 = 0x06, 49 DE_FORMAT_BGRX_8888 = 0x07, 50 DE_FORMAT_RGB_888 = 0x08, 51 DE_FORMAT_BGR_888 = 0x09, 52 DE_FORMAT_RGB_565 = 0x0a, 53 DE_FORMAT_BGR_565 = 0x0b, 54 DE_FORMAT_ARGB_4444 = 0x0c, 55 DE_FORMAT_ABGR_4444 = 0x0d, 56 DE_FORMAT_RGBA_4444 = 0x0e, 57 DE_FORMAT_BGRA_4444 = 0x0f, 58 DE_FORMAT_ARGB_1555 = 0x10, 59 DE_FORMAT_ABGR_1555 = 0x11, 60 DE_FORMAT_RGBA_5551 = 0x12, 61 DE_FORMAT_BGRA_5551 = 0x13, 62 DE_FORMAT_A2R10G10B10 = 0x14, 63 DE_FORMAT_A2B10G10R10 = 0x15, 64 DE_FORMAT_R10G10B10A2 = 0x16, 65 DE_FORMAT_B10G10R10A2 = 0x17, 66 DE_FORMAT_1bpp_palette_LE = 0x18, 67 DE_FORMAT_2bpp_palette_LE = 0x19, 68 DE_FORMAT_4bpp_palette_LE = 0x1a, 69 DE_FORMAT_8bpp_palette_LE = 0x1b, 70 /* SP: semi-planar, P:planar, I:interleaved 71 * UVUV: U in the LSBs; VUVU: V in the LSBs 72 */ 73 DE_FORMAT_YUV444_I_AYUV = 0x40, 74 /* MSB A-Y-U-V LSB, reserved */ 75 DE_FORMAT_YUV444_I_VUYA = 0x41, 76 /* MSB V-U-Y-A LSB */ 77 DE_FORMAT_YUV422_I_YVYU = 0x42, 78 /* MSB Y-V-Y-U LSB */ 79 DE_FORMAT_YUV422_I_YUYV = 0x43, 80 /* MSB Y-U-Y-V LSB */ 81 DE_FORMAT_YUV422_I_UYVY = 0x44, 82 /* MSB U-Y-V-Y LSB */ 83 DE_FORMAT_YUV422_I_VYUY = 0x45, 84 /* MSB V-Y-U-Y LSB */ 85 DE_FORMAT_YUV444_P = 0x46, 86 /* MSB P3-2-1-0 LSB, YYYY UUUU VVVV, reserved */ 87 DE_FORMAT_YUV422_P = 0x47, 88 /* MSB P3-2-1-0 LSB YYYY UU VV */ 89 DE_FORMAT_YUV420_P = 0x48, 90 /* MSB P3-2-1-0 LSB YYYY U V */ 91 DE_FORMAT_YUV411_P = 0x49, 92 /* MSB P3-2-1-0 LSB YYYY U V */ 93 DE_FORMAT_YUV422_SP_UVUV = 0x4a, 94 /* MSB V-U-V-U LSB */ 95 DE_FORMAT_YUV422_SP_VUVU = 0x4b, 96 /* MSB U-V-U-V LSB */ 97 DE_FORMAT_YUV420_SP_UVUV = 0x4c, 98 DE_FORMAT_YUV420_SP_VUVU = 0x4d, 99 DE_FORMAT_YUV411_SP_UVUV = 0x4e, 100 DE_FORMAT_YUV411_SP_VUVU = 0x4f, 101 }; 102 103 enum de_3d_in_mode { 104 DE_3D_SRC_NORMAL = 0x0, 105 /* not 3d mode */ 106 DE_3D_SRC_MODE_TB = 0x1 << 0, 107 /* top bottom */ 108 DE_3D_SRC_MODE_FP = 0x1 << 1, 109 /* frame packing */ 110 DE_3D_SRC_MODE_SSF = 0x1 << 2, 111 /* side by side full */ 112 DE_3D_SRC_MODE_SSH = 0x1 << 3, 113 /* side by side half */ 114 DE_3D_SRC_MODE_LI = 0x1 << 4, 115 /* line interleaved */ 116 }; 117 118 enum de_3d_out_mode { 119 DE_3D_OUT_MODE_CI_1 = 0x5, 120 /* column interleaved 1 */ 121 DE_3D_OUT_MODE_CI_2 = 0x6, 122 /* column interleaved 2 */ 123 DE_3D_OUT_MODE_CI_3 = 0x7, 124 /* column interleaved 3 */ 125 DE_3D_OUT_MODE_CI_4 = 0x8, 126 /* column interleaved 4 */ 127 DE_3D_OUT_MODE_LIRGB = 0x9, 128 /* line interleaved rgb */ 129 130 DE_3D_OUT_MODE_TB = 0x0, 131 /* top bottom */ 132 DE_3D_OUT_MODE_FP = 0x1, 133 /* frame packing */ 134 DE_3D_OUT_MODE_SSF = 0x2, 135 /* side by side full */ 136 DE_3D_OUT_MODE_SSH = 0x3, 137 /* side by side half */ 138 DE_3D_OUT_MODE_LI = 0x4, 139 /* line interleaved */ 140 DE_3D_OUT_MODE_FA = 0xa, 141 /* field alternative */ 142 }; 143 144 enum de_dirty_flags { 145 DE_LAYER_ATTR_DIRTY = 0x00000001, 146 DE_LAYER_VI_FC_DIRTY = 0x00000002, 147 DE_LAYER_HADDR_DIRTY = 0x00000004, 148 DE_LAYER_SIZE_DIRTY = 0x00000008, 149 DE_BLEND_ENABLE_DIRTY = 0x00000010, 150 DE_BLEND_ATTR_DIRTY = 0x00000020, 151 DE_BLEND_CTL_DIRTY = 0x00000040, 152 DE_BLEND_OUT_DIRTY = 0x00000080, 153 DE_LAYER_ALL_DIRTY = 0x000000ff, 154 155 }; 156 157 enum de_bld_mode { 158 /* 159 * pixel color = sc * sa * cfs + dc * da * cfd 160 * pixel alpha = sa * afs + da * afd 161 * sc = source color 162 * sa = source alpha 163 * dc = destination color 164 * da = destination alpha 165 * cfs = source color factor for blend function 166 * cfd = destination color factor for blend function 167 * afs = source alpha factor for blend function 168 * afd = destination alpha factor for blend function 169 */ 170 DE_BLD_CLEAR = 0x00, 171 /* cfs/afs: 0 cfd/afd: 0 */ 172 DE_BLD_SRC = 0x01, 173 /* cfs/afs: 1 cfd/afd: 0 */ 174 DE_BLD_DST = 0x02, 175 /* cfs/afs: 0 cfd/afd: 1 */ 176 DE_BLD_SRCOVER = 0x03, 177 /* cfs/afs: 1 cfd/afd: 1-sa */ 178 DE_BLD_DSTOVER = 0x04, 179 /* cfs/afs: 1-da cfd/afd: 1 */ 180 DE_BLD_SRCIN = 0x05, 181 /* cfs/afs: da cfd/afd: 0 */ 182 DE_BLD_DSTIN = 0x06, 183 /* cfs/afs: 0 cfd/afd: sa */ 184 DE_BLD_SRCOUT = 0x07, 185 /* cfs/afs: 1-da cfd/afd: 0 */ 186 DE_BLD_DSTOUT = 0x08, 187 /* cfs/afs: 0 cfd/afd: 1-sa */ 188 DE_BLD_SRCATOP = 0x09, 189 /* cfs/afs: da cfd/afd: 1-sa */ 190 DE_BLD_DSTATOP = 0x0a, 191 /* cfs/afs: 1-da cfd/afd: sa */ 192 DE_BLD_XOR = 0x0b, 193 /* cfs/afs: 1-da cfd/afd: 1-sa */ 194 }; 195 196 enum de_ck_mode { 197 DE_CK_SRC = 0x0, 198 /* the pixel value match source image, 199 * it displays the destination image pixel 200 */ 201 DE_CK_DST = 0x1, 202 /* the pixel value match destination image, 203 * it displays the source image pixel 204 */ 205 }; 206 207 enum de_coarsescale_sts { 208 DE_NO_CS = 0x0, 209 /* no coarse scale in both direction */ 210 DE_CS_HORZ = 0x1, 211 /* coarse scale only in horizon */ 212 DE_CS_VERT = 0x2, 213 /* coarse scale only in vertical */ 214 DE_CS_BOTHDIR = 0x3 215 /* coarse scale in both direction */ 216 }; 217 218 struct de_fb { 219 unsigned int w; 220 unsigned int h; 221 }; 222 223 struct de_rect { 224 int x; 225 int y; 226 unsigned int w; 227 unsigned int h; 228 }; 229 230 struct de_rect64 { 231 long long x; 232 long long y; 233 unsigned long long w; 234 unsigned long long h; 235 }; 236 237 struct de_reg_blocks { 238 void *val; 239 /* address from memory */ 240 uintptr_t off; 241 /* register offset */ 242 unsigned int size; 243 /* unit:byte */ 244 unsigned char dirty; 245 }; 246 247 struct __lay_para_t { 248 bool en; 249 bool fcolor_en; 250 bool top_bot_en; 251 unsigned char fmt; 252 unsigned char alpha_mode; 253 unsigned char premul_ctl; 254 unsigned char alpha; 255 256 unsigned char haddr_t[3]; 257 unsigned char haddr_b[3]; 258 unsigned int pitch[3]; 259 struct de_rect layer; 260 unsigned int laddr_t[3]; 261 unsigned int laddr_b[3]; 262 struct de_rect lbc_crop; 263 unsigned int lbc_laddr; 264 unsigned int lbc_haddr; 265 unsigned int lbc_en; 266 struct disp_lbc_info lbc_info; 267 }; 268 269 struct __bld_ch_para_t { 270 unsigned char fcolor_en; 271 unsigned char pipe_en; 272 unsigned char route; 273 unsigned char alpha_mode; 274 unsigned int fcolor; 275 unsigned int inwidth; 276 unsigned int inheight; 277 unsigned int offsetx; 278 unsigned int offsety; 279 }; 280 281 struct __bld_para_t { 282 unsigned char pixel_fs[4]; 283 unsigned char pixel_fd[4]; 284 unsigned char alpha_fs[4]; 285 unsigned char alpha_fd[4]; 286 287 unsigned char ck_en[4]; 288 unsigned char ck_dir[4]; 289 unsigned char ck_con[4]; 290 unsigned int ck_max[4]; 291 unsigned int ck_min[4]; 292 unsigned int bkcolor; 293 unsigned int outwidth; 294 unsigned int outheight; 295 unsigned int out_ctl; 296 struct __bld_ch_para_t ch_attr[5]; 297 }; 298 299 /* DATA typedef structURE */ 300 struct scaler_para { 301 int hphase; 302 /* initial phase of vsu/gsu in horizon */ 303 int vphase; 304 /* initial phase of vsu/gsu in vertical */ 305 unsigned int hstep; 306 /* scale step of vsu/gsu in horizon */ 307 unsigned int vstep; 308 /* scale step of vsu/gsu in vertical */ 309 }; 310 311 int de_rtmx_init(unsigned int sel, uintptr_t reg_base); 312 int de_rtmx_exit(unsigned int sel); 313 int de_rtmx_update_regs(unsigned int sel); 314 int de_rtmx_set_gld_reg_base(unsigned int sel, void *base); 315 int de_rtmx_set_bld_reg_base(unsigned int sel, void *base); 316 int de_rtmx_set_overlay_reg_base(unsigned int sel, unsigned int chno, 317 void *base); 318 int de_rtmx_set_lay_cfg(unsigned int sel, unsigned int chno, unsigned int layno, 319 struct __lay_para_t *cfg); 320 int de_rtmx_set_lay_haddr(unsigned int sel, unsigned int chno, 321 unsigned int layno, unsigned char top_bot_en, 322 unsigned char *haddr_t, unsigned char *haddr_b, unsigned int lbc_en); 323 int de_rtmx_set_lay_laddr(unsigned int sel, unsigned int chno, 324 unsigned int layno, unsigned char fmt, struct de_rect crop, 325 unsigned int *size, unsigned int *align, 326 enum de_3d_in_mode trdinmode, unsigned int *addr, 327 unsigned char *haddr, unsigned int lbc_en); 328 int de_rtmx_get_3d_in(unsigned char fmt, struct de_rect crop, 329 struct de_fb *size, 330 unsigned int *align, enum de_3d_in_mode trdinmode, 331 unsigned int *addr, unsigned int *trd_addr, 332 unsigned int *pitch, unsigned int *pitchr, 333 unsigned int *lay_laddr); 334 int de_rtmx_get_3d_in_single_size(enum de_3d_in_mode inmode, 335 struct de_rect64 *size); 336 int de_rtmx_get_3d_out(struct de_rect frame0, unsigned int scn_w, 337 unsigned int scn_h, enum de_3d_out_mode trdoutmode, 338 struct de_rect *frame1); 339 int de_rtmx_get_li_addr_offset(unsigned int size, unsigned int align, 340 unsigned int x, unsigned int y, 341 unsigned int cnt); 342 int de_rtmx_set_lay_fcolor(unsigned int sel, unsigned int chno, 343 unsigned int layno, unsigned char en, 344 unsigned char fmt, unsigned int color, unsigned int lbc_en); 345 int de_rtmx_set_overlay_size(unsigned int sel, unsigned int chno, 346 unsigned int w, unsigned int h, unsigned int lbc_en); 347 int de_rtmx_set_coarse_fac(unsigned int sel, unsigned char chno, 348 unsigned int fmt, unsigned int lcd_fps, 349 unsigned int lcd_height, unsigned int de_freq_mhz, 350 unsigned int ovl_w, unsigned int ovl_h, 351 unsigned int vsu_outw, unsigned int vsu_outh, 352 unsigned int *midyw, unsigned int *midyh, 353 unsigned int *midcw, unsigned int *midch); 354 int de_rtmx_set_pf_en(unsigned int sel, unsigned char *pen); 355 int de_rtmx_set_pipe_cfg(unsigned int sel, unsigned char pno, 356 unsigned int color, struct de_rect bldrc); 357 int de_rtmx_set_route(unsigned int sel, unsigned char pno, unsigned int zoder); 358 int de_rtmx_set_premul(unsigned int sel, unsigned char pno, 359 unsigned int pre_mul); 360 int de_rtmx_set_background_color(unsigned int sel, unsigned int color); 361 int de_rtmx_set_blend_size(unsigned int sel, unsigned int w, unsigned int h); 362 int de_rtmx_set_blend_mode(unsigned int sel, unsigned int bldno, 363 unsigned char mode); 364 int de_rtmx_set_blend_color(unsigned int sel, unsigned int bldno, 365 unsigned int color); 366 int de_rtmx_set_outitl(unsigned int sel, unsigned char interlace_en); 367 int de_rtmx_set_colorkey(unsigned int sel, unsigned char ck_no, 368 unsigned char ck_mode, unsigned char ck_red_match, 369 unsigned char ck_green_match, 370 unsigned char ck_blue_match, unsigned int ck_max, 371 unsigned int ck_min); 372 int de_rtmx_calc_chnrect(unsigned char *lay_en, int laynum, 373 struct de_rect *frame, struct de_rect *crop, int gsu_sel, 374 struct scaler_para *step, struct de_rect *layer, 375 struct de_rect *bld_rect, unsigned int *ovlw, unsigned int *ovlh); 376 int de_rtmx_trimcoord(struct de_rect *frame, struct de_rect *crop, 377 unsigned int outw, unsigned int outh, int xratio, int yratio); 378 int de_rtmx_get_premul_ctl(int laynum, unsigned char *premul); 379 struct de_rect de_rtmx_extend_rect(struct de_rect rc1, struct de_rect rc2); 380 int de_rtmx_set_dbuff_rdy(unsigned int sel); 381 int de_rtmx_set_enable(unsigned int sel, unsigned int en); 382 int de_rtmx_set_display_size(unsigned int sel, unsigned int width, 383 unsigned int height); 384 int de_rtmx_query_irq(unsigned int sel); 385 int de_rtmx_enable_irq(unsigned int sel, unsigned int en); 386 387 int de_rtmx_mux(unsigned int sel, unsigned int tcon_index); 388 int de_rtmx_get_mux(unsigned int sel); 389 int de_rtmx_sync_hw(unsigned int sel); 390 int de_rtmx_get_lay_enabled(unsigned int sel, unsigned int chno, 391 unsigned int layno); 392 int de_rtmx_get_lay_address(unsigned int sel, unsigned int chno, 393 unsigned int layno, unsigned long long *addr); 394 int de_rtmx_get_lay_size(unsigned int sel, unsigned int chno, 395 unsigned int layno, struct disp_rectsz *size); 396 int de_rtmx_get_lay_win(unsigned int sel, unsigned int chno, unsigned int layno, 397 struct disp_rect *win); 398 int de_rtmx_get_lay_format(unsigned int sel, unsigned int chno, 399 unsigned int layno); 400 int de_rtmx_get_display_size(unsigned int sel, unsigned int *width, 401 unsigned int *height); 402 int de_rtmx_set_palette(unsigned int sel, unsigned int chno, 403 void *data, unsigned int num); 404 int de_rtmx_set_dither_out(unsigned int sel, unsigned int en, unsigned int fifo_3d, 405 unsigned int mode, unsigned int fmt); 406 #endif 407