| /libcpu/risc-v/common64/ |
| A D | riscv.h | 22 #define __MASKVALUE(value,maskvalue) ((value) & (maskvalue)) argument
23 #define __UMASKVALUE(value,maskvalue) ((value) & (~(maskvalue))) argument
24 #define __CHECKUPBOUND(value,bit_count) (!(((rt_ubase_t)value) & (~__MASK(bit_count)))) argument
25 #define __CHECKALIGN(value,start_bit) (!(((rt_ubase_t)value) & (__MASK(start_bit)))) argument
27 #define __PARTBIT(value,start_bit,length) (((value) >> (start_bit)) & __MASK(length)) argument
29 #define __ALIGNUP(value,bit) (((value) + __MASK(bit)) & __UMASK(bit)) argument
30 #define __ALIGNDOWN(value,bit) ((value) & __UMASK(bit)) argument
|
| /libcpu/arm/cortex-a/ |
| A D | gtimer.c | 18 static inline void __set_cntfrq(rt_uint32_t value) in __set_cntfrq()
38 static inline void __set_cntp_tval(rt_uint32_t value) in __set_cntp_tval()
69 static inline void __set_cntp_cval(rt_uint64_t value) in __set_cntp_cval()
89 static inline void __set_cntp_ctl(rt_uint32_t value) in __set_cntp_ctl()
107 void gtimer_set_counter_frequency(rt_uint32_t value) in gtimer_set_counter_frequency()
124 void gtimer_set_load_value(rt_uint32_t value) in gtimer_set_load_value()
149 void gtimer_set_physical_compare_value(rt_uint64_t value) in gtimer_set_physical_compare_value()
166 void gtimer_set_control(rt_uint32_t value) in gtimer_set_control()
|
| A D | cpuport.c | 100 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/aarch64/common/ |
| A D | cpuport.c | 26 int __rt_ffs(int value) in __rt_ffs()
43 unsigned long __rt_ffsl(unsigned long value) in __rt_ffsl()
59 unsigned long __rt_clz(unsigned long value) in __rt_clz()
|
| A D | gicv3.c | 317 void arm_gic_set_system_register_enable_mask(rt_uint64_t index, rt_uint64_t value) in arm_gic_set_system_register_enable_mask()
330 rt_uint64_t value; in arm_gic_get_system_register_enable_mask() local
448 rt_uint64_t i, value; in gicv3_sgi_target_list_set() local
740 rt_uint64_t value; in arm_gic_cpu_init() local
|
| /libcpu/arm/arm926/ |
| A D | mmu.c | 17 register rt_uint32_t value; in mmu_setttbase() local
38 register rt_uint32_t value; in mmu_enable() local
50 register rt_uint32_t value; in mmu_disable() local
62 register rt_uint32_t value; in mmu_enable_icache() local
74 register rt_uint32_t value; in mmu_enable_dcache() local
86 register rt_uint32_t value; in mmu_disable_icache() local
98 register rt_uint32_t value; in mmu_disable_dcache() local
110 register rt_uint32_t value; in mmu_enable_alignfault() local
122 register rt_uint32_t value; in mmu_disable_alignfault() local
178 register rt_uint32_t value; in mmu_invalidate_tlb() local
[all …]
|
| A D | cpuport.c | 68 rt_uint32_t value; in cache_enable() local
80 rt_uint32_t value; in cache_disable() local
189 int __rt_ffs(int value) in __rt_ffs()
207 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/dm36x/ |
| A D | mmu.c | 15 register rt_uint32_t value; in mmu_setttbase() local
46 register rt_uint32_t value; in mmu_enable() local
58 register rt_uint32_t value; in mmu_disable() local
70 register rt_uint32_t value; in mmu_enable_icache() local
82 register rt_uint32_t value; in mmu_enable_dcache() local
94 register rt_uint32_t value; in mmu_disable_icache() local
106 register rt_uint32_t value; in mmu_disable_dcache() local
118 register rt_uint32_t value; in mmu_enable_alignfault() local
130 register rt_uint32_t value; in mmu_disable_alignfault() local
198 register rt_uint32_t value; in mmu_invalidate_tlb() local
[all …]
|
| A D | cpuport.c | 67 rt_uint32_t value; in cache_enable() local
79 rt_uint32_t value; in cache_disable() local
188 int __rt_ffs(int value) in __rt_ffs()
206 int __rt_ffs(int value) in __rt_ffs()
217 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/armv6/ |
| A D | mmu.c | 15 register rt_uint32_t value; in mmu_setttbase() local
46 register rt_uint32_t value; in mmu_enable() local
58 register rt_uint32_t value; in mmu_disable() local
70 register rt_uint32_t value; in mmu_enable_icache() local
82 register rt_uint32_t value; in mmu_enable_dcache() local
94 register rt_uint32_t value; in mmu_disable_icache() local
106 register rt_uint32_t value; in mmu_disable_dcache() local
118 register rt_uint32_t value; in mmu_enable_alignfault() local
130 register rt_uint32_t value; in mmu_disable_alignfault() local
198 register rt_uint32_t value; in mmu_invalidate_tlb() local
[all …]
|
| A D | cpuport.c | 69 rt_uint32_t value; in cache_enable() local
81 rt_uint32_t value; in cache_disable() local
190 int __rt_ffs(int value) in __rt_ffs()
208 int __rt_ffs(int value) in __rt_ffs()
219 int __rt_ffs(int value) in __rt_ffs()
|
| A D | vfp.c | 20 unsigned int value; in vfp_init() local
|
| /libcpu/arm/s3c24x0/ |
| A D | mmu.c | 189 register rt_uint32_t value; in mmu_enable() local
201 register rt_uint32_t value; in mmu_disable() local
213 register rt_uint32_t value; in mmu_enable_icache() local
225 register rt_uint32_t value; in mmu_enable_dcache() local
237 register rt_uint32_t value; in mmu_disable_icache() local
249 register rt_uint32_t value; in mmu_disable_dcache() local
261 register rt_uint32_t value; in mmu_enable_alignfault() local
273 register rt_uint32_t value; in mmu_disable_alignfault() local
293 register rt_uint32_t value; in mmu_invalidate_tlb() local
304 register rt_uint32_t value; in mmu_invalidate_icache() local
|
| A D | cpu.c | 70 rt_uint32_t value; in cache_enable() local
82 rt_uint32_t value; in cache_disable() local
|
| /libcpu/c-sky/common/ |
| A D | csi_instr.h | 117 __ALWAYS_INLINE uint32_t __REV(uint32_t value) in __REV()
129 __ALWAYS_INLINE uint32_t __REV16(uint32_t value) in __REV16()
148 __ALWAYS_INLINE int32_t __REVSH(int32_t value) in __REVSH()
183 __ALWAYS_INLINE uint32_t __RBIT(uint32_t value) in __RBIT()
265 __ALWAYS_INLINE uint32_t __USAT(uint32_t value, uint32_t sat) in __USAT()
288 __ALWAYS_INLINE uint32_t __IUSAT(uint32_t value, uint32_t sat) in __IUSAT()
393 __ALWAYS_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr) in __STRBT()
406 __ALWAYS_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr) in __STRHT()
419 __ALWAYS_INLINE void __STRT(uint32_t value, volatile uint32_t *addr) in __STRT()
|
| /libcpu/arm/cortex-r4/ |
| A D | cpu.c | 21 int __rt_ffs(int value) in __rt_ffs()
72 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/common/ |
| A D | atomic_arm.c | 58 #define __STREXW(value, ptr) __strex(value, ptr) argument
60 #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) … argument
63 _Pragma("inline=forced") __intrinsic rt_atomic_t __STREXW(rt_atomic_t value, volatile rt_atomic_t *… in __STREXW()
68 __attribute__((always_inline)) static inline rt_atomic_t __STREXW(volatile rt_atomic_t value, v… in __STREXW()
|
| /libcpu/arm/sep4020/ |
| A D | cpu.c | 74 rt_uint32_t value; in cp15_rd() local
86 rt_uint32_t value; in cp15_rd() local
|
| /libcpu/arm/cortex-m3/ |
| A D | cpuport.c | 367 __asm int __rt_ffs(int value) in __rt_ffs()
380 int __rt_ffs(int value) in __rt_ffs()
398 int __rt_ffs(int value) in __rt_ffs()
409 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/am335x/ |
| A D | cpu.c | 40 rt_uint32_t value; in cache_enable() local
52 rt_uint32_t value; in cache_disable() local
|
| /libcpu/aarch64/common/include/ |
| A D | cpuport.h | 28 rt_uint32_t value; member
|
| /libcpu/arm/cortex-m4/ |
| A D | cpuport.c | 451 __asm int __rt_ffs(int value) in __rt_ffs()
464 int __rt_ffs(int value) in __rt_ffs()
482 int __rt_ffs(int value) in __rt_ffs()
493 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/cortex-m7/ |
| A D | cpuport.c | 475 __asm int __rt_ffs(int value) in __rt_ffs()
488 int __rt_ffs(int value) in __rt_ffs()
506 int __rt_ffs(int value) in __rt_ffs()
517 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/cortex-m33/ |
| A D | cpuport.c | 533 __asm int __rt_ffs(int value) in __rt_ffs()
546 int __rt_ffs(int value) in __rt_ffs()
561 int __rt_ffs(int value) in __rt_ffs()
572 int __rt_ffs(int value) in __rt_ffs()
|
| /libcpu/arm/cortex-m85/ |
| A D | cpuport.c | 465 __asm int __rt_ffs(int value) in __rt_ffs()
478 int __rt_ffs(int value) in __rt_ffs()
496 int __rt_ffs(int value) in __rt_ffs()
507 int __rt_ffs(int value) in __rt_ffs()
|