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Searched refs:BIT28 (Results 1 – 25 of 33) sorted by relevance

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/bsp/acm32/acm32f4xx-nucleo/libraries/Device/
A DSystem_ACM32F4.h191 #define SCU_IPRST_UACRST BIT28
256 #define SCU_IPCKENR_AESCLKEN BIT28
322 #define SCU_LDOCR_LPLDO12_TRIM (BIT28|BIT27|BIT26)
386 #define SCU_PASEL1_PA7_SEL (BIT31|BIT30|BIT29|BIT28)
396 #define SCU_PASEL2_PA15_SEL (BIT31|BIT30|BIT29|BIT28)
406 #define SCU_PBSEL1_PB7_SEL (BIT31|BIT30|BIT29|BIT28)
416 #define SCU_PBSEL2_PB15_SEL (BIT31|BIT30|BIT29|BIT28)
427 #define SCU_PASTR_PA14_STH (BIT29|BIT28)
445 #define SCU_PBSTR_PB14_STH (BIT29|BIT28)
462 #define SCU_PCSEL1_PC7_SEL (BIT31|BIT30|BIT29|BIT28)
[all …]
A DACM32F4.h134 #define BIT28 (1U << 28) macro
/bsp/acm32/acm32f0x0-nucleo/libraries/Device/
A DSystem_ACM32F0x0.h278 #define SCU_IPRST_UACRST BIT28
342 #define SCU_IPCKENR_AESCLKEN BIT28
408 #define SCU_LDOCR_LPLDO12_TRIM (BIT28|BIT27|BIT26)
472 #define SCU_PASEL1_PA7_SEL (BIT31|BIT30|BIT29|BIT28)
482 #define SCU_PASEL2_PA15_SEL (BIT31|BIT30|BIT29|BIT28)
492 #define SCU_PBSEL1_PB7_SEL (BIT31|BIT30|BIT29|BIT28)
502 #define SCU_PBSEL2_PB15_SEL (BIT31|BIT30|BIT29|BIT28)
513 #define SCU_PASTR_PA14_STH (BIT29|BIT28)
531 #define SCU_PBSTR_PB14_STH (BIT29|BIT28)
548 #define SCU_PCSEL1_PC7_SEL (BIT31|BIT30|BIT29|BIT28)
[all …]
A DACM32F0x0.h113 #define BIT28 (1U << 28) macro
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/inc/
A Dapm32e10x_fmc.h82 #define FLASH_WRP_PAGE_112_115 ((uint32_t)BIT28) /*!< Write protection of page 112 to 115…
116 #define FLASH_WRP_PAGE_56_57 ((uint32_t)BIT28) /*!< Write protection of page 56 to 57 */
A Dapm32e10x_rcm.h267 RCM_APB1_PERIPH_PMU = BIT28,
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/inc/
A Dapm32f10x_fmc.h82 #define FLASH_WRP_PAGE_112_115 ((uint32_t)BIT28) /*!< Write protection of page 112 to 115…
116 #define FLASH_WRP_PAGE_56_57 ((uint32_t)BIT28) /*!< Write protection of page 56 to 57 */
A Dapm32f10x_rcm.h410 RCM_APB1_PERIPH_PMU = BIT28,
/bsp/Vango/v85xx/Libraries/CMSIS/Vango/V85xx/Include/
A Dtype_def.h49 #define BIT28 0x10000000 macro
/bsp/Vango/v85xxp/Libraries/CMSIS/Vango/V85xxP/Include/
A Dtype_def.h52 #define BIT28 0x10000000 macro
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_StdPeriphDriver/inc/
A Dapm32f4xx_rcm.h273 RCM_AHB1_PERIPH_ETH_MAC_PTP = BIT28, /*!< Select ETH MAC PTP clock */
319 RCM_APB1_PERIPH_PMU = BIT28, /*!< Select PMU clock */
/bsp/acm32/acm32f4xx-nucleo/libraries/HAL_Driver/Inc/
A DHAL_OPA.h16 #define OPA_CSR_HSM (BIT28)
A DHAL_COMP.h22 #define COMP_CR_CRV_CFG_MASK (BIT28|BIT27|BIT26|BIT25)
A DHAL_RTC.h79 #define RPMU_CR_WU5FILEN BIT28
A DHAL_ADC.h34 #define ADC_CR1_AWDJCH_MASK (BIT31|BIT30|BIT29|BIT28|BIT27)
/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/inc/
A Dapm32s10x_fmc.h80 #define FLASH_WRP_PAGE_112_115 ((uint32_t)BIT28) /*!< Write protection of page 112 to 115…
A Dapm32s10x_rcm.h253 RCM_APB1_PERIPH_PMU = BIT28
/bsp/acm32/acm32f0x0-nucleo/libraries/HAL_Driver/Inc/
A DHAL_COMP.h22 #define COMP_CR_CRV_CFG_MASK (BIT28|BIT27|BIT26|BIT25)
A DHAL_RTC.h79 #define RPMU_CR_WU5FILEN BIT28
A DHAL_ADC.h34 #define ADC_CR1_AWDJCH_MASK (BIT31|BIT30|BIT29|BIT28|BIT27)
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_ble_driver/inc/
A Dco_utils.h74 #define BIT28 0x10000000L macro
/bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/inc/
A Dapm32f0xx_rcm.h326 RCM_APB1_PERIPH_PMU = BIT28, /*!< PMU peripheral clock */
A Dapm32f0xx_usart.h63 USART_WORD_LEN_7B = BIT12 | BIT28 /*!< only available for APM32F072 and APM32F030 devices */
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_ETH_Driver/inc/
A Dapm32f10x_eth.h722 ETH_DMA_OVERFLOW_RXFIFOCOUNTER = BIT28, /*!< Overflow for FIFO Overflows Counter */
/bsp/apm32/libraries/APM32F4xx_Library/APM32F4xx_ETH_Driver/inc/
A Dapm32f4xx_eth.h722 ETH_DMA_OVERFLOW_RXFIFOCOUNTER = BIT28, /*!< Overflow for FIFO Overflows Counter */

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