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Searched refs:CFG (Results 1 – 25 of 157) sorted by relevance

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/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_acmp_drv.h173 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_DACEN_MASK) in acmp_channel_enable_dac()
188 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_HPMODE_MASK) in acmp_channel_enable_hpmode()
201 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_HYST_MASK) in acmp_channel_set_hyst()
216 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_CMPEN_MASK) in acmp_channel_enable_cmp()
231 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_CMPOEN_MASK) in acmp_channel_enable_cmp_output()
246 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_FLTBYPS_MASK) in acmp_channel_cmp_output_bypass_filter()
261 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_WINEN_MASK) in acmp_channel_enable_cmp_window_mode()
276 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_OPOL_MASK) in acmp_channel_invert_output()
289 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_FLTMODE_MASK) in acmp_channel_set_filter_mode()
304 ptr->CHANNEL[ch].CFG = (ptr->CHANNEL[ch].CFG & ~ACMP_CHANNEL_CFG_SYNCEN_MASK) in acmp_channel_enable_sync()
[all …]
A Dhpm_opamp_drv.h191 opamp->CFG[preset_chn].CFG1 |= OPAMP_CFG_CFG1_EN_LV_MASK; in opamp_preset_opamp_enable()
212 opamp->CFG[preset_chn].CFG1 &= ~OPAMP_CFG_CFG1_EN_LV_MASK; in opamp_preset_opamp_disable()
235 …opamp->CFG[preset_chn].CFG0 = (opamp->CFG[preset_chn].CFG0 & (~OPAMP_CFG_CFG0_MILLER_SEL_MASK)) | … in opamp_preset_miller_cap_select()
300 …opamp->CFG[preset_chn].CFG0 = (opamp->CFG[preset_chn].CFG0 & (~OPAMP_CFG_CFG0_VIM_SEL_MASK)) | OPA… in opamp_preset_inn_pad_select()
325 …opamp->CFG[preset_chn].CFG1 = (opamp->CFG[preset_chn].CFG1 & (~OPAMP_CFG_CFG1_GAIN_SEL_MASK)) | OP… in opamp_preset_gain_select()
346 opamp->CFG[preset_chn].CFG1 |= OPAMP_CFG_CFG1_VBYPASS_LV_MASK; in opamp_preset_disconnect_vssa()
367 opamp->CFG[preset_chn].CFG1 &= ~OPAMP_CFG_CFG1_VBYPASS_LV_MASK; in opamp_preset_connect_vssa()
390 …opamp->CFG[preset_chn].CFG0 = (opamp->CFG[preset_chn].CFG0 & (~OPAMP_CFG_CFG0_VIP_SEL_MASK)) | OPA… in opamp_preset_inp_pad_select()
479 opamp->CFG[preset_chn].CFG2 = OPAMP_CFG_CFG2_CHANNEL_SET(chn); in opamp_set_preset_x_chn()
500 opamp->CFG[preset_chn].CFG1 |= OPAMP_CFG_CFG1_HW_TRIG_EN_MASK; in opamp_preset_enable_hw_trig()
[all …]
A Dhpm_jpeg_drv.h119 ptr->CFG = 0; in jpeg_clear_cfg()
129 ptr->CFG &= ~JPEG_CFG_JPEG_EN_MASK; in jpeg_disable()
139 ptr->CFG |= JPEG_CFG_JPEG_EN_MASK; in jpeg_enable()
149 ptr->CFG &= ~JPEG_CFG_START_MASK; in jpeg_stop()
159 ptr->CFG |= JPEG_CFG_START_MASK; in jpeg_start()
207 ptr->CFG |= JPEG_CFG_JPEG_SFTRST_MASK; in jpeg_software_reset()
208 ptr->CFG &= ~JPEG_CFG_JPEG_SFTRST_MASK; in jpeg_software_reset()
/bsp/n32/libraries/N32G4FR_Firmware_Library/CMSIS/device/
A Dsystem_n32g4fr.c162 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
171 RCC->CFG &= (uint32_t)0xF700FFFF; in SystemInit()
246 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
260 pllmull = RCC->CFG & RCC_CFG_PLLMULFCT; in SystemCoreClockUpdate()
261 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
347 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
352 RCC->CFG |= (uint32_t)RCC_CFG_APB2PRES_DIV2; in SetSysClock()
376 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
388 rcc_cfgr = RCC->CFG; in SetSysClock()
402 RCC->CFG = rcc_cfgr; in SetSysClock()
[all …]
/bsp/n32/libraries/N32G45x_Firmware_Library/CMSIS/device/
A Dsystem_n32g45x.c162 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
171 RCC->CFG &= (uint32_t)0xF700FFFF; in SystemInit()
246 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
260 pllmull = RCC->CFG & RCC_CFG_PLLMULFCT; in SystemCoreClockUpdate()
261 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
347 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
352 RCC->CFG |= (uint32_t)RCC_CFG_APB2PRES_DIV2; in SetSysClock()
376 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
388 rcc_cfgr = RCC->CFG; in SetSysClock()
402 RCC->CFG = rcc_cfgr; in SetSysClock()
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/CMSIS/device/
A Dsystem_n32wb452.c162 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
171 RCC->CFG &= (uint32_t)0xF700FFFF; in SystemInit()
246 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
260 pllmull = RCC->CFG & RCC_CFG_PLLMULFCT; in SystemCoreClockUpdate()
261 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
347 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
352 RCC->CFG |= (uint32_t)RCC_CFG_APB2PRES_DIV2; in SetSysClock()
376 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
388 rcc_cfgr = RCC->CFG; in SetSysClock()
402 RCC->CFG = rcc_cfgr; in SetSysClock()
[all …]
/bsp/n32g452xx/Libraries/N32_Std_Driver/CMSIS/device/
A Dsystem_n32g45x.c162 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
171 RCC->CFG &= (uint32_t)0xF700FFFF; in SystemInit()
246 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
260 pllmull = RCC->CFG & RCC_CFG_PLLMULFCT; in SystemCoreClockUpdate()
261 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
347 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
352 RCC->CFG |= (uint32_t)RCC_CFG_APB2PRES_DIV2; in SetSysClock()
376 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
388 rcc_cfgr = RCC->CFG; in SetSysClock()
402 RCC->CFG = rcc_cfgr; in SetSysClock()
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/CMSIS/device/
A Dsystem_n32l43x.c223 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
232 RCC->CFG &= (uint32_t)0x0700FFFF; in SystemInit()
327 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
349 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
514 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
543 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_MSI; in SetSysClock()
552 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSI; in SetSysClock()
561 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
574 rcc_cfg = RCC->CFG; in SetSysClock()
595 RCC->CFG = rcc_cfg; in SetSysClock()
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/CMSIS/device/
A Dsystem_n32l40x.c224 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
233 RCC->CFG &= (uint32_t)0x0700FFFF; in SystemInit()
331 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
353 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
518 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
547 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_MSI; in SetSysClock()
556 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSI; in SetSysClock()
565 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
578 rcc_cfg = RCC->CFG; in SetSysClock()
599 RCC->CFG = rcc_cfg; in SetSysClock()
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/CMSIS/device/
A Dsystem_n32g43x.c223 RCC->CFG &= (uint32_t)0xF8FFC000; in SystemInit()
232 RCC->CFG &= (uint32_t)0x0700FFFF; in SystemInit()
327 tmp = RCC->CFG & RCC_CFG_SCLKSTS; in SystemCoreClockUpdate()
349 pllsource = RCC->CFG & RCC_CFG_PLLSRC; in SystemCoreClockUpdate()
514 RCC->CFG |= (uint32_t)RCC_CFG_AHBPRES_DIV1; in SetSysClock()
543 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_MSI; in SetSysClock()
552 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSI; in SetSysClock()
561 RCC->CFG |= (uint32_t)RCC_CFG_SCLKSW_HSE; in SetSysClock()
574 rcc_cfg = RCC->CFG; in SetSysClock()
595 RCC->CFG = rcc_cfg; in SetSysClock()
[all …]
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_lptim.c183 MODIFY_REG(LPTIMx->CFG, in LPTIM_Init()
272 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_RELOAD, UpdateMode); in LPTIM_SetUpdateMode()
420 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_WAVE, Waveform); in LPTIM_SetWaveform()
447 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_WAVEPOL, Polarity); in LPTIM_SetPolarity()
485 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_CLKPRE, Prescaler); in LPTIM_SetPrescaler()
529 SET_BIT(LPTIMx->CFG, LPTIM_CFG_TIMOUTEN); in LPTIM_EnableTimeout()
543 CLEAR_BIT(LPTIMx->CFG, LPTIM_CFG_TIMOUTEN); in LPTIM_DisableTimeout()
566 CLEAR_BIT(LPTIMx->CFG, LPTIM_CFG_TRGEN); in LPTIM_TrigSw()
800 SET_BIT(LPTIMx->CFG, LPTIM_CFG_ENC); in LPTIM_EnableEncoderMode()
815 SET_BIT(LPTIMx->CFG, LPTIM_CFG_NENC); in LPTIM_EnableNoEncoderMode()
[all …]
A Dn32l43x_rcc.c538 tmpregister = RCC->CFG; in RCC_ConfigPll()
587 tmpregister = RCC->CFG; in RCC_ConfigSysclk()
593 RCC->CFG = tmpregister; in RCC_ConfigSysclk()
630 tmpregister = RCC->CFG; in RCC_ConfigHclk()
636 RCC->CFG = tmpregister; in RCC_ConfigHclk()
655 tmpregister = RCC->CFG; in RCC_ConfigPclk1()
661 RCC->CFG = tmpregister; in RCC_ConfigPclk1()
680 tmpregister = RCC->CFG; in RCC_ConfigPclk2()
686 RCC->CFG = tmpregister; in RCC_ConfigPclk2()
1696 tmpregister = RCC->CFG; in RCC_ConfigMcoClkPre()
[all …]
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_lptim.c183 MODIFY_REG(LPTIMx->CFG, in LPTIM_Init()
272 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_RELOAD, UpdateMode); in LPTIM_SetUpdateMode()
420 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_WAVE, Waveform); in LPTIM_SetWaveform()
447 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_WAVEPOL, Polarity); in LPTIM_SetPolarity()
485 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_CLKPRE, Prescaler); in LPTIM_SetPrescaler()
529 SET_BIT(LPTIMx->CFG, LPTIM_CFG_TIMOUTEN); in LPTIM_EnableTimeout()
543 CLEAR_BIT(LPTIMx->CFG, LPTIM_CFG_TIMOUTEN); in LPTIM_DisableTimeout()
566 CLEAR_BIT(LPTIMx->CFG, LPTIM_CFG_TRGEN); in LPTIM_TrigSw()
800 SET_BIT(LPTIMx->CFG, LPTIM_CFG_ENC); in LPTIM_EnableEncoderMode()
815 SET_BIT(LPTIMx->CFG, LPTIM_CFG_NENC); in LPTIM_EnableNoEncoderMode()
[all …]
A Dn32l40x_rcc.c558 tmpregister = RCC->CFG; in RCC_ConfigPll()
608 tmpregister = RCC->CFG; in RCC_ConfigSysclk()
614 RCC->CFG = tmpregister; in RCC_ConfigSysclk()
651 tmpregister = RCC->CFG; in RCC_ConfigHclk()
657 RCC->CFG = tmpregister; in RCC_ConfigHclk()
676 tmpregister = RCC->CFG; in RCC_ConfigPclk1()
682 RCC->CFG = tmpregister; in RCC_ConfigPclk1()
701 tmpregister = RCC->CFG; in RCC_ConfigPclk2()
707 RCC->CFG = tmpregister; in RCC_ConfigPclk2()
1756 tmpregister = RCC->CFG; in RCC_ConfigMcoClkPre()
[all …]
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_lptim.c183 MODIFY_REG(LPTIMx->CFG, in LPTIM_Init()
272 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_RELOAD, UpdateMode); in LPTIM_SetUpdateMode()
420 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_WAVE, Waveform); in LPTIM_SetWaveform()
447 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_WAVEPOL, Polarity); in LPTIM_SetPolarity()
485 MODIFY_REG(LPTIMx->CFG, LPTIM_CFG_CLKPRE, Prescaler); in LPTIM_SetPrescaler()
529 SET_BIT(LPTIMx->CFG, LPTIM_CFG_TIMOUTEN); in LPTIM_EnableTimeout()
543 CLEAR_BIT(LPTIMx->CFG, LPTIM_CFG_TIMOUTEN); in LPTIM_DisableTimeout()
566 CLEAR_BIT(LPTIMx->CFG, LPTIM_CFG_TRGEN); in LPTIM_TrigSw()
800 SET_BIT(LPTIMx->CFG, LPTIM_CFG_ENC); in LPTIM_EnableEncoderMode()
815 SET_BIT(LPTIMx->CFG, LPTIM_CFG_NENC); in LPTIM_EnableNoEncoderMode()
[all …]
/bsp/synwit/libraries/SWM341_CSL/SWM341_StdPeriph_Driver/
A DSWM341_sfc.c43 SFC->CFG |= (1 << SFC_CFG_CMDWREN_Pos); in SFC_Init()
47 SFC->CFG &= ~(1 << SFC_CFG_CMDWREN_Pos); in SFC_Init()
69 SFC->CFG &= ~SFC_CFG_CMDTYPE_Msk; in SFC_ReadJEDEC()
109 SFC->CFG &= ~SFC_CFG_CMDTYPE_Msk; in SFC_EraseEx()
110 SFC->CFG |= (1 << SFC_CFG_WREN_Pos) | in SFC_EraseEx()
119 SFC->CFG &= ~SFC_CFG_WREN_Msk; in SFC_EraseEx()
138 SFC->CFG |= (1 << SFC_CFG_WREN_Pos); in SFC_Write()
143 SFC->CFG &= ~SFC_CFG_WREN_Msk; in SFC_Write()
238 SFC->CFG &= ~SFC_CFG_CMDTYPE_Msk; in SFC_ReadStatusReg()
261 SFC->CFG &= ~SFC_CFG_CMDTYPE_Msk; in SFC_WriteStatusReg()
[all …]
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_rcc.c350 tmpregister = RCC->CFG; in RCC_ConfigPll()
356 RCC->CFG = tmpregister; in RCC_ConfigPll()
385 tmpregister = RCC->CFG; in RCC_ConfigSysclk()
391 RCC->CFG = tmpregister; in RCC_ConfigSysclk()
427 tmpregister = RCC->CFG; in RCC_ConfigHclk()
433 RCC->CFG = tmpregister; in RCC_ConfigHclk()
452 tmpregister = RCC->CFG; in RCC_ConfigPclk1()
458 RCC->CFG = tmpregister; in RCC_ConfigPclk1()
477 tmpregister = RCC->CFG; in RCC_ConfigPclk2()
483 RCC->CFG = tmpregister; in RCC_ConfigPclk2()
[all …]
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_rcc.c350 tmpregister = RCC->CFG; in RCC_ConfigPll()
356 RCC->CFG = tmpregister; in RCC_ConfigPll()
385 tmpregister = RCC->CFG; in RCC_ConfigSysclk()
391 RCC->CFG = tmpregister; in RCC_ConfigSysclk()
427 tmpregister = RCC->CFG; in RCC_ConfigHclk()
433 RCC->CFG = tmpregister; in RCC_ConfigHclk()
452 tmpregister = RCC->CFG; in RCC_ConfigPclk1()
458 RCC->CFG = tmpregister; in RCC_ConfigPclk1()
477 tmpregister = RCC->CFG; in RCC_ConfigPclk2()
483 RCC->CFG = tmpregister; in RCC_ConfigPclk2()
[all …]
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_rcc.c350 tmpregister = RCC->CFG; in RCC_ConfigPll()
356 RCC->CFG = tmpregister; in RCC_ConfigPll()
385 tmpregister = RCC->CFG; in RCC_ConfigSysclk()
391 RCC->CFG = tmpregister; in RCC_ConfigSysclk()
427 tmpregister = RCC->CFG; in RCC_ConfigHclk()
433 RCC->CFG = tmpregister; in RCC_ConfigHclk()
452 tmpregister = RCC->CFG; in RCC_ConfigPclk1()
458 RCC->CFG = tmpregister; in RCC_ConfigPclk1()
477 tmpregister = RCC->CFG; in RCC_ConfigPclk2()
483 RCC->CFG = tmpregister; in RCC_ConfigPclk2()
[all …]
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_rcc.c352 tmpregister = RCC->CFG; in RCC_ConfigPll()
358 RCC->CFG = tmpregister; in RCC_ConfigPll()
387 tmpregister = RCC->CFG; in RCC_ConfigSysclk()
393 RCC->CFG = tmpregister; in RCC_ConfigSysclk()
429 tmpregister = RCC->CFG; in RCC_ConfigHclk()
435 RCC->CFG = tmpregister; in RCC_ConfigHclk()
454 tmpregister = RCC->CFG; in RCC_ConfigPclk1()
460 RCC->CFG = tmpregister; in RCC_ConfigPclk1()
479 tmpregister = RCC->CFG; in RCC_ConfigPclk2()
485 RCC->CFG = tmpregister; in RCC_ConfigPclk2()
[all …]
/bsp/apm32/libraries/APM32E10x_Library/APM32E10x_StdPeriphDriver/src/
A Dapm32e10x_wwdt.c71 reg = WWDT->CFG & 0xFFFFFE7F; in WWDT_ConfigTimebase()
73 WWDT->CFG = reg; in WWDT_ConfigTimebase()
89 reg = WWDT->CFG & 0xFFFFFF80; in WWDT_ConfigWindowData()
91 WWDT->CFG = reg; in WWDT_ConfigWindowData()
/bsp/apm32/libraries/APM32F10x_Library/APM32F10x_StdPeriphDriver/src/
A Dapm32f10x_wwdt.c71 reg = WWDT->CFG & 0xFFFFFE7F; in WWDT_ConfigTimebase()
73 WWDT->CFG = reg; in WWDT_ConfigTimebase()
89 reg = WWDT->CFG & 0xFFFFFF80; in WWDT_ConfigWindowData()
91 WWDT->CFG = reg; in WWDT_ConfigWindowData()
/bsp/apm32/libraries/APM32S10x_Library/APM32S10x_StdPeriphDriver/src/
A Dapm32s10x_wwdt.c71 reg = WWDT->CFG & 0xFFFFFE7F; in WWDT_ConfigTimebase()
73 WWDT->CFG = reg; in WWDT_ConfigTimebase()
89 reg = WWDT->CFG & 0xFFFFFF80; in WWDT_ConfigWindowData()
91 WWDT->CFG = reg; in WWDT_ConfigWindowData()
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_iso7816.c34 ISO7816x->CFG &= ~ISO7816_CFG_EN; in ISO7816_DeInit()
39 ISO7816x->CFG = ISO7816_CFG_RSTValue; in ISO7816_DeInit()
103 tmp = ISO7816x->CFG; in ISO7816_Init()
115 ISO7816x->CFG = tmp; in ISO7816_Init()
139 ISO7816x->CFG |= ISO7816_CFG_EN; in ISO7816_Cmd()
143 ISO7816x->CFG &= ~ISO7816_CFG_EN; in ISO7816_Cmd()
263 ISO7816x->CFG |= INTMask; in ISO7816_INTConfig()
267 ISO7816x->CFG &= ~INTMask; in ISO7816_INTConfig()
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_iso7816.c59 tmp = ISO7816x->CFG; in ISO7816_Init()
66 ISO7816x->CFG = tmp; in ISO7816_Init()
103 ISO7816x->CFG &= ~ISO7816_CFG_EN; in ISO7816_DeInit()
109 ISO7816x->CFG = ISO7816_CFG_RSTValue; in ISO7816_DeInit()
129 ISO7816x->CFG |= ISO7816_CFG_EN; in ISO7816_Cmd()
133 ISO7816x->CFG &= ~ISO7816_CFG_EN; in ISO7816_Cmd()
250 ISO7816x->CFG |= INTMask; in ISO7816_INTConfig()
254 ISO7816x->CFG &= ~INTMask; in ISO7816_INTConfig()

Completed in 772 milliseconds

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