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Searched refs:FREQM_SYNCBUSY_SWRST (Results 1 – 10 of 10) sorted by relevance

/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_freqm_d51.h166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
214 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_set_CTRLA_SWRST_bit()
221 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_get_CTRLA_SWRST_bit()
231 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_set_CTRLA_ENABLE_bit()
238 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_get_CTRLA_ENABLE_bit()
252 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_write_CTRLA_ENABLE_bit()
260 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_clear_CTRLA_ENABLE_bit()
268 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/samc21/bsp/hri/
A Dhri_freqm_c21.h166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
214 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_set_CTRLA_SWRST_bit()
221 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_get_CTRLA_SWRST_bit()
231 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_set_CTRLA_ENABLE_bit()
238 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_get_CTRLA_ENABLE_bit()
252 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_write_CTRLA_ENABLE_bit()
260 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_clear_CTRLA_ENABLE_bit()
268 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_freqm_d51.h166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
214 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_set_CTRLA_SWRST_bit()
221 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_get_CTRLA_SWRST_bit()
231 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_set_CTRLA_ENABLE_bit()
238 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_get_CTRLA_ENABLE_bit()
252 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_write_CTRLA_ENABLE_bit()
260 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_clear_CTRLA_ENABLE_bit()
268 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_freqm_e54.h166 return (((Freqm *)hw)->SYNCBUSY.reg & FREQM_SYNCBUSY_SWRST) >> FREQM_SYNCBUSY_SWRST_Pos; in hri_freqm_get_SYNCBUSY_SWRST_bit()
214 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_set_CTRLA_SWRST_bit()
221 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_get_CTRLA_SWRST_bit()
231 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_set_CTRLA_ENABLE_bit()
238 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_get_CTRLA_ENABLE_bit()
252 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_write_CTRLA_ENABLE_bit()
260 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_clear_CTRLA_ENABLE_bit()
268 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/saml10/bsp/hri/
A Dhri_freqm_l10.h214 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_set_CTRLA_SWRST_bit()
221 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST); in hri_freqm_get_CTRLA_SWRST_bit()
231 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_set_CTRLA_ENABLE_bit()
238 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_get_CTRLA_ENABLE_bit()
252 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_write_CTRLA_ENABLE_bit()
260 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_clear_CTRLA_ENABLE_bit()
268 hri_freqm_wait_for_sync(hw, FREQM_SYNCBUSY_SWRST | FREQM_SYNCBUSY_ENABLE); in hri_freqm_toggle_CTRLA_ENABLE_bit()
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dfreqm.h191 #define FREQM_SYNCBUSY_SWRST (_U_(0x1) << FREQM_SYNCBUSY_SWRST_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dfreqm.h191 #define FREQM_SYNCBUSY_SWRST (_U_(0x1) << FREQM_SYNCBUSY_SWRST_Pos) macro
/bsp/microchip/same54/bsp/include/component/
A Dfreqm.h191 #define FREQM_SYNCBUSY_SWRST (_U_(0x1) << FREQM_SYNCBUSY_SWRST_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dfreqm.h191 #define FREQM_SYNCBUSY_SWRST (_U_(0x1) << FREQM_SYNCBUSY_SWRST_Pos) macro
/bsp/microchip/saml10/bsp/include/component/
A Dfreqm.h221 #define FREQM_SYNCBUSY_SWRST FREQM_SYNCBUSY_SWRST_Msk /**< \de… macro

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