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Searched refs:FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (Results 1 – 3 of 3) sorted by relevance

/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/
A DRV32M1_zero_riscy_features.h453 #define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (1) macro
A DRV32M1_ri5cy_features.h447 #define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (1) macro
/bsp/frdm-k64f/device/
A DMK64F12_features.h1180 #define FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE (0) macro

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