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Searched refs:IWDG_WriteAccess_Enable (Results 1 – 15 of 15) sorted by relevance

/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/
A DHAL_iwdg.h53 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
55 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/tkm32F499/Libraries/Hal_lib/inc/
A DHAL_iwdg.h53 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
55 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/
A DHAL_iwdg.h53 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
55 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/
A DHAL_iwdg.h53 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
55 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x_iwdg.h36 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
38 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/
A Dft32f0xx_iwdg.h40 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
42 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/inc/
A Dhk32f0xx_iwdg.h39 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
41 #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
/bsp/airm2m/air32f103/libraries/rt_drivers/
A Ddrv_wdt.c59 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in air32_wdt_control()
70 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in air32_wdt_control()
/bsp/wch/risc-v/Libraries/ch32_drivers/
A Ddrv_iwdt.c71 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in ch32_wdt_control()
89 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in ch32_wdt_control()
/bsp/wch/arm/Libraries/ch32_drivers/
A Ddrv_iwdt_ch32f10x.c73 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in ch32_wdt_control()
97 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in ch32_wdt_control()
A Ddrv_iwdt_ch32f20x.c73 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in ch32_wdt_control()
97 IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); in ch32_wdt_control()
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f10x_iwdg.h19 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32f20x_iwdg.h19 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/inc/
A Dch32v10x_iwdg.h21 #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) macro
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/
A Dhal_iwdg.h66 IWDG_WriteAccess_Enable = 0x5555, // Enable write enumerator

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