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Searched refs:MCLK_AHBMASK_HSRAM_Pos (Results 1 – 8 of 8) sorted by relevance

/bsp/microchip/samc21/bsp/samc21/include/component/
A Dmclk.h168 #define MCLK_AHBMASK_HSRAM_Pos 6 /**< \brief (MCLK_AHBMASK) HSRAM AHB Clock Mask */ macro
169 #define MCLK_AHBMASK_HSRAM (_U_(0x1) << MCLK_AHBMASK_HSRAM_Pos)
/bsp/microchip/same54/bsp/include/component/
A Dmclk.h201 #define MCLK_AHBMASK_HSRAM_Pos 7 /**< \brief (MCLK_AHBMASK) HSRAM AHB Clock Mask */ macro
202 #define MCLK_AHBMASK_HSRAM (_U_(0x1) << MCLK_AHBMASK_HSRAM_Pos)
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dmclk.h200 #define MCLK_AHBMASK_HSRAM_Pos 7 /**< \brief (MCLK_AHBMASK) HSRAM AHB Clock Mask */ macro
201 #define MCLK_AHBMASK_HSRAM (_U_(0x1) << MCLK_AHBMASK_HSRAM_Pos)
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dmclk.h200 #define MCLK_AHBMASK_HSRAM_Pos 7 /**< \brief (MCLK_AHBMASK) HSRAM AHB Clock Mask */ macro
201 #define MCLK_AHBMASK_HSRAM (_U_(0x1) << MCLK_AHBMASK_HSRAM_Pos)
/bsp/microchip/samc21/bsp/hri/
A Dhri_mclk_c21.h492 tmp = (tmp & MCLK_AHBMASK_HSRAM) >> MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_get_AHBMASK_HSRAM_bit()
502 tmp |= value << MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_write_AHBMASK_HSRAM_bit()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_mclk_d51.h557 tmp = (tmp & MCLK_AHBMASK_HSRAM) >> MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_get_AHBMASK_HSRAM_bit()
567 tmp |= value << MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_write_AHBMASK_HSRAM_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_mclk_e54.h557 tmp = (tmp & MCLK_AHBMASK_HSRAM) >> MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_get_AHBMASK_HSRAM_bit()
567 tmp |= value << MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_write_AHBMASK_HSRAM_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_mclk_d51.h557 tmp = (tmp & MCLK_AHBMASK_HSRAM) >> MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_get_AHBMASK_HSRAM_bit()
567 tmp |= value << MCLK_AHBMASK_HSRAM_Pos; in hri_mclk_write_AHBMASK_HSRAM_bit()

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