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Searched refs:PHY_Status_REG (Results 1 – 8 of 8) sorted by relevance

/bsp/stm32/stm32h750-artpi/board/port/
A Ddrv_eth.h42 #define PHY_Status_REG 0x1FU macro
57 #define PHY_Status_REG 0x1FU macro
64 #define PHY_Status_REG 0x11U macro
79 #define PHY_Status_REG 0x10U macro
A Ddrv_eth.c417 HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ADDR, PHY_Status_REG, (uint32_t *)&SR); in phy_linkchange()
/bsp/apm32/libraries/Drivers/
A Ddrv_eth.h32 #define PHY_Status_REG 0x1FU macro
41 #define PHY_Status_REG 0x11U macro
57 #define PHY_Status_REG 0x10U macro
83 #define PHY_Status_REG 0x1FU macro
A Ddrv_eth.c621 SR = ETH_ReadPHYRegister(phy_addr, PHY_Status_REG); in phy_linkchange()
/bsp/renesas/libraries/HAL_Drivers/
A Ddrv_eth.h46 #define PHY_Status_REG 0x1FU macro
55 #define PHY_Status_REG 0x11U macro
71 #define PHY_Status_REG 0x10U macro
97 #define PHY_Status_REG 0x1FU macro
/bsp/stm32/libraries/HAL_Drivers/drivers/
A Ddrv_eth.h44 #define PHY_Status_REG 0x1FU macro
53 #define PHY_Status_REG 0x11U macro
69 #define PHY_Status_REG 0x10U macro
93 #define PHY_Status_REG 0x11U macro
A Ddrv_eth.c424 HAL_ETH_ReadPHYRegister(&EthHandle, PHY_Status_REG, (uint32_t *)&SR); in phy_linkchange()
/bsp/nxp/mcx/mcxn/Libraries/drivers/
A Ddrv_eth.c58 #define PHY_Status_REG 0x1FU macro
335 ENET_MDIORead(EXAMPLE_ENET_BASE, phy_addr, PHY_Status_REG, &SR); in phy_monitor_thread_entry()

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