Home
last modified time | relevance | path

Searched refs:REG_SERCOM1_SPI_INTENCLR (Results 1 – 7 of 7) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/instance/
A Dsercom1.h74 #define REG_SERCOM1_SPI_INTENCLR (0x42000C0CU) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */ macro
112 #define REG_SERCOM1_SPI_INTENCLR (*(RwReg8 *)0x42000C0CU) /**< \brief (SERCOM1) SPI Interrupt Ena… macro
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/instance/
A Dsercom1.h72 #define REG_SERCOM1_SPI_INTENCLR (0x42000C14U) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */ macro
115 #define REG_SERCOM1_SPI_INTENCLR (*(RwReg8 *)0x42000C14U) /**< \brief (SERCOM1) SPI Interrupt Ena… macro
/bsp/microchip/samc21/bsp/samc21/include/instance/
A Dsercom1.h58 #define REG_SERCOM1_SPI_INTENCLR (0x42000814) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */ macro
102 #define REG_SERCOM1_SPI_INTENCLR (*(RwReg8 *)0x42000814UL) /**< \brief (SERCOM1) SPI Interrupt En… macro
/bsp/microchip/saml10/bsp/include/instance/
A Dsercom1.h60 #define REG_SERCOM1_SPI_INTENCLR (0x42000814) /**< (SERCOM1) SPI Interrupt Enable Clear */ macro
107 #define REG_SERCOM1_SPI_INTENCLR (*(__IO uint8_t*)0x42000814U) /**< (SERCOM1) SPI Interrupt Enable … macro
/bsp/microchip/same54/bsp/include/instance/
A Dsercom1.h62 #define REG_SERCOM1_SPI_INTENCLR (0x40003414) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */ macro
113 #define REG_SERCOM1_SPI_INTENCLR (*(RwReg8 *)0x40003414UL) /**< \brief (SERCOM1) SPI Interrupt En… macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/instance/
A Dsercom1.h62 #define REG_SERCOM1_SPI_INTENCLR (0x40003414) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */ macro
113 #define REG_SERCOM1_SPI_INTENCLR (*(RwReg8 *)0x40003414UL) /**< \brief (SERCOM1) SPI Interrupt En… macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/instance/
A Dsercom1.h62 #define REG_SERCOM1_SPI_INTENCLR (0x40003414) /**< \brief (SERCOM1) SPI Interrupt Enable Clear */ macro
113 #define REG_SERCOM1_SPI_INTENCLR (*(RwReg8 *)0x40003414UL) /**< \brief (SERCOM1) SPI Interrupt En… macro

Completed in 10 milliseconds