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Searched refs:SCGOUTClock (Results 1 – 2 of 2) sorted by relevance

/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/
A Dsystem_RV32M1_ri5cy.c390 …uint32_t SCGOUTClock; /* Variable to store output clock frequency … in SystemCoreClockUpdate() local
397 SCGOUTClock = CPU_XTAL_CLK_HZ; in SystemCoreClockUpdate()
401 …SCGOUTClock = (((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT) ? 8000000 : 20… in SystemCoreClockUpdate()
405 …SCGOUTClock = 48000000 + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 40… in SystemCoreClockUpdate()
409 …SCGOUTClock = 48000000 + ((SCG->LPFLLCFG & SCG_LPFLLCFG_FSEL_MASK) >> SCG_LPFLLCFG_FSEL_SHIFT) * 2… in SystemCoreClockUpdate()
414 SystemCoreClock = (SCGOUTClock / Divider); in SystemCoreClockUpdate()
A Dsystem_RV32M1_zero_riscy.c393 …uint32_t SCGOUTClock; /* Variable to store output clock frequency … in SystemCoreClockUpdate() local
400 SCGOUTClock = CPU_XTAL_CLK_HZ; in SystemCoreClockUpdate()
404 …SCGOUTClock = (((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT) ? 8000000 : 20… in SystemCoreClockUpdate()
408 …SCGOUTClock = 48000000 + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 40… in SystemCoreClockUpdate()
412 …SCGOUTClock = 48000000 + ((SCG->LPFLLCFG & SCG_LPFLLCFG_FSEL_MASK) >> SCG_LPFLLCFG_FSEL_SHIFT) * 2… in SystemCoreClockUpdate()
417 SystemCoreClock = (SCGOUTClock / Divider); in SystemCoreClockUpdate()

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