| /bsp/samd21/sam_d2x_asflib/sam0/drivers/sercom/spi_master_vec/ |
| A D | spi_master_vec.c | 245 spi_hw->CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in spi_master_vec_enable()
269 spi_hw->CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in spi_master_vec_disable()
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/sercom/spi/ |
| A D | spi.h | 1037 spi_module->CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in spi_enable()
1070 spi_module->CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in spi_disable()
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| A D | spi.c | 450 ctrla |= SERCOM_SPI_CTRLA_ENABLE; in _spi_check_config()
500 if (spi_module->CTRLA.reg & SERCOM_SPI_CTRLA_ENABLE) { in spi_init()
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| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 2355 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_master()
2375 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_slave()
2444 if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) { in _spi_m_sync_init()
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| /bsp/microchip/samc21/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 2402 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_master()
2422 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_slave()
2467 if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) { in _spi_m_sync_init()
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| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 2355 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_master()
2375 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_slave()
2444 if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) { in _spi_m_sync_init()
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| /bsp/microchip/saml10/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 2355 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_master()
2375 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_slave()
2444 if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) { in _spi_m_sync_init()
|
| /bsp/microchip/same54/bsp/hpl/sercom/ |
| A D | hpl_sercom.c | 2428 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_master()
2448 hw, regs->ctrla & ~(SERCOM_SPI_CTRLA_IBON | SERCOM_SPI_CTRLA_ENABLE | SERCOM_SPI_CTRLA_SWRST)); in _spi_load_regs_slave()
2517 if (hri_sercomspi_get_CTRLA_reg(hw, SERCOM_SPI_CTRLA_ENABLE)) { in _spi_m_sync_init()
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| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/ |
| A D | sercom.h | 210 #define SERCOM_SPI_CTRLA_ENABLE (0x1ul << SERCOM_SPI_CTRLA_ENABLE_Pos) macro
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| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/ |
| A D | sercom.h | 224 #define SERCOM_SPI_CTRLA_ENABLE (0x1ul << SERCOM_SPI_CTRLA_ENABLE_Pos) macro
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| /bsp/microchip/samc21/bsp/samc21/include/component/ |
| A D | sercom.h | 186 #define SERCOM_SPI_CTRLA_ENABLE (_U_(0x1) << SERCOM_SPI_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/same54/bsp/include/component/ |
| A D | sercom.h | 186 #define SERCOM_SPI_CTRLA_ENABLE (_U_(0x1) << SERCOM_SPI_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/ |
| A D | sercom.h | 186 #define SERCOM_SPI_CTRLA_ENABLE (_U_(0x1) << SERCOM_SPI_CTRLA_ENABLE_Pos) macro
|
| /bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/ |
| A D | sercom.h | 186 #define SERCOM_SPI_CTRLA_ENABLE (_U_(0x1) << SERCOM_SPI_CTRLA_ENABLE_Pos) macro
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| /bsp/microchip/saml10/bsp/include/component/ |
| A D | sercom.h | 210 #define SERCOM_SPI_CTRLA_ENABLE SERCOM_SPI_CTRLA_ENABLE_Msk /**< \de… macro
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| /bsp/microchip/samc21/bsp/hri/ |
| A D | hri_sercom_c21.h | 2375 ((Sercom *)hw)->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_set_CTRLA_ENABLE_bit()
2385 tmp = (tmp & SERCOM_SPI_CTRLA_ENABLE) >> SERCOM_SPI_CTRLA_ENABLE_Pos; in hri_sercomspi_get_CTRLA_ENABLE_bit()
2394 tmp &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_write_CTRLA_ENABLE_bit()
2404 ((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_clear_CTRLA_ENABLE_bit()
2412 ((Sercom *)hw)->SPI.CTRLA.reg ^= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_toggle_CTRLA_ENABLE_bit()
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| /bsp/microchip/saml10/bsp/hri/ |
| A D | hri_sercom_l10.h | 2397 ((Sercom *)hw)->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_set_CTRLA_ENABLE_bit()
2407 tmp = (tmp & SERCOM_SPI_CTRLA_ENABLE) >> SERCOM_SPI_CTRLA_ENABLE_Pos; in hri_sercomspi_get_CTRLA_ENABLE_bit()
2416 tmp &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_write_CTRLA_ENABLE_bit()
2426 ((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_clear_CTRLA_ENABLE_bit()
2434 ((Sercom *)hw)->SPI.CTRLA.reg ^= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_toggle_CTRLA_ENABLE_bit()
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| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/ |
| A D | hri_sercom_d51.h | 2423 ((Sercom *)hw)->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_set_CTRLA_ENABLE_bit()
2433 tmp = (tmp & SERCOM_SPI_CTRLA_ENABLE) >> SERCOM_SPI_CTRLA_ENABLE_Pos; in hri_sercomspi_get_CTRLA_ENABLE_bit()
2442 tmp &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_write_CTRLA_ENABLE_bit()
2452 ((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_clear_CTRLA_ENABLE_bit()
2460 ((Sercom *)hw)->SPI.CTRLA.reg ^= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_toggle_CTRLA_ENABLE_bit()
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| /bsp/microchip/same54/bsp/hri/ |
| A D | hri_sercom_e54.h | 2423 ((Sercom *)hw)->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_set_CTRLA_ENABLE_bit()
2433 tmp = (tmp & SERCOM_SPI_CTRLA_ENABLE) >> SERCOM_SPI_CTRLA_ENABLE_Pos; in hri_sercomspi_get_CTRLA_ENABLE_bit()
2442 tmp &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_write_CTRLA_ENABLE_bit()
2452 ((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_clear_CTRLA_ENABLE_bit()
2460 ((Sercom *)hw)->SPI.CTRLA.reg ^= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_toggle_CTRLA_ENABLE_bit()
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| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/ |
| A D | hri_sercom_d51.h | 2423 ((Sercom *)hw)->SPI.CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_set_CTRLA_ENABLE_bit()
2433 tmp = (tmp & SERCOM_SPI_CTRLA_ENABLE) >> SERCOM_SPI_CTRLA_ENABLE_Pos; in hri_sercomspi_get_CTRLA_ENABLE_bit()
2442 tmp &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_write_CTRLA_ENABLE_bit()
2452 ((Sercom *)hw)->SPI.CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_clear_CTRLA_ENABLE_bit()
2460 ((Sercom *)hw)->SPI.CTRLA.reg ^= SERCOM_SPI_CTRLA_ENABLE; in hri_sercomspi_toggle_CTRLA_ENABLE_bit()
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