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Searched refs:TIM_DCR_DBA_1 (Results 1 – 25 of 38) sorted by relevance

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/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_tim.h621 #define LL_TIM_DMABURST_BASEADDR_SMCR TIM_DCR_DBA_1
622 #define LL_TIM_DMABURST_BASEADDR_DIER (TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
625 #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …
626 #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
629 #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 | TIM_DCR_DBA_1) …
630 #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) …
632 #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) …
633 #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM…
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_tim.h596 #define TIM_DCR_DBA_1 (0x02U << TIM_DCR_DBA_Pos) ///< Bit 1 macro
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h3637 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
A Dft32f030x8.h3678 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
A Dft32f072x8.h3727 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
A Dft32f032x8.h3720 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
A Dft32f032x6.h3719 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
A Dft32f072xb.h3956 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h3219 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h3228 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h3523 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h3348 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!<Bit 1 */ macro
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h4729 #define TIM_DCR_DBA_1 (0x02U << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dhk32f031x4x6.h4780 #define TIM_DCR_DBA_1 (0x02U << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dhk32f04ax4x6x8.h4709 #define TIM_DCR_DBA_1 (0x02U << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x.h3698 #define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!< Bit 1 */ macro
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h6003 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l100xba.h6151 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l151xb.h5955 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l151xba.h6031 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l152xb.h6105 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l152xba.h6166 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l100xc.h6720 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l162xdx.h7327 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro
A Dstm32l162xe.h7327 #define TIM_DCR_DBA_1 (0x02UL << TIM_DCR_DBA_Pos) /*!< 0x00000002 */ macro

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