| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/Device/Holtek/HT32F5xxxx/Source/ |
| A D | system_ht32f5xxxx_16.c | 141 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 3: WS = 3, 9: AUTO … macro
283 #if ((__CK_AHB > WS2_CLK) && (WAIT_STATE < 3) || \
284 (__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
285 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
372 #if (WAIT_STATE == 9) in SystemInit()
381 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_10.c | 138 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
278 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
279 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
368 #if (WAIT_STATE == 9) in SystemInit()
375 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_03.c | 157 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
311 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
312 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
416 #if (WAIT_STATE == 9) in SystemInit()
423 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_05.c | 155 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
308 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
309 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
408 #if (WAIT_STATE == 9) in SystemInit()
415 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_06.c | 142 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
295 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
296 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
395 #if (WAIT_STATE == 9) in SystemInit()
402 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_08.c | 150 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
316 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
317 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
416 #if (WAIT_STATE == 9) in SystemInit()
423 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_09.c | 143 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
296 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
297 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
396 #if (WAIT_STATE == 9) in SystemInit()
403 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_11.c | 149 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
317 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
318 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
417 #if (WAIT_STATE == 9) in SystemInit()
424 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_12.c | 141 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
294 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
295 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
392 #if (WAIT_STATE == 9) in SystemInit()
399 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_14.c | 145 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
298 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
299 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
396 #if (WAIT_STATE == 9) in SystemInit()
403 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_15.c | 143 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
296 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
297 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
394 #if (WAIT_STATE == 9) in SystemInit()
401 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_17.c | 144 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
297 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
298 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
395 #if (WAIT_STATE == 9) in SystemInit()
402 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_18.c | 148 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: AUTO … macro
302 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
303 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
407 #if (WAIT_STATE == 9) in SystemInit()
414 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f0006.c | 137 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 9: WS = AUTO … macro
290 #if ((__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
381 #if (WAIT_STATE == 9) in SystemInit()
386 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_07.c | 141 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 9: WS = AUTO … macro
294 #if ((__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
385 #if (WAIT_STATE == 9) in SystemInit()
390 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5826.c | 141 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 9: WS = AUTO … macro
308 #if ((__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
407 #if (WAIT_STATE == 9) in SystemInit()
412 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_01.c | 153 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 9: WS = AUTO … macro
320 #if ((__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
419 #if (WAIT_STATE == 9) in SystemInit()
424 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f5xxxx_02.c | 166 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 9: WS = AUTO … macro
333 #if ((__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
432 #if (WAIT_STATE == 9) in SystemInit()
437 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| /bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/Device/Holtek/HT32F1xxxx/Source/ |
| A D | system_ht32f1xxxx_02.c | 145 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 3: WS = 3, 9: WS = AUTO … macro
301 #if ((__CK_AHB > WS2_CLK) && (WAIT_STATE < 3) || \
302 (__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
303 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
409 #if (WAIT_STATE == 9) in SystemInit()
418 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f1xxxx_03.c | 148 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 3: WS = 3, 9: WS = AUTO … macro
304 #if ((__CK_AHB > WS2_CLK) && (WAIT_STATE < 3) || \
305 (__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
306 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
409 #if (WAIT_STATE == 9) in SystemInit()
418 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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| A D | system_ht32f1xxxx_01.c | 138 #define WAIT_STATE (9) /*!< 0: WS = 0, 1: WS = 1, 2: WS = 2, 9: WS = AUTO … macro
279 #if ((__CK_AHB > WS1_CLK) && (WAIT_STATE < 2) || \
280 (__CK_AHB > WS0_CLK) && (WAIT_STATE < 1))
366 #if (WAIT_STATE == 9) in SystemInit()
373 …HT_FLASH->CFCR = (((HT_FLASH->CFCR) & ~7UL) | (WAIT_STATE + 1)); /* manual wait state … in SystemInit()
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