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Searched refs:assert (Results 1 – 25 of 252) sorted by relevance

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/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_lpuart_edma.c78 assert(param); in LPUART_SendEDMACallback()
100 assert(param); in LPUART_ReceiveEDMACallback()
128 assert(handle); in LPUART_TransferCreateHandleEDMA()
176 assert(handle); in LPUART_SendEDMA()
178 assert(xfer); in LPUART_SendEDMA()
217 assert(handle); in LPUART_ReceiveEDMA()
219 assert(xfer); in LPUART_ReceiveEDMA()
258 assert(handle); in LPUART_TransferAbortSendEDMA()
272 assert(handle); in LPUART_TransferAbortReceiveEDMA()
288 assert(count); in LPUART_TransferGetReceiveCountEDMA()
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A Dfsl_intmux.h79 assert(channel < FSL_FEATURE_INTMUX_CHANNEL_COUNT); in INTMUX_ResetChannel()
99 assert(channel < FSL_FEATURE_INTMUX_CHANNEL_COUNT); in INTMUX_SetChannelMode()
117 assert(channel < FSL_FEATURE_INTMUX_CHANNEL_COUNT); in INTMUX_EnableInterrupt()
118 assert(irq >= FSL_FEATURE_INTMUX_IRQ_START_INDEX); in INTMUX_EnableInterrupt()
132 assert(channel < FSL_FEATURE_INTMUX_CHANNEL_COUNT); in INTMUX_DisableInterrupt()
133 assert(irq >= FSL_FEATURE_INTMUX_IRQ_START_INDEX); in INTMUX_DisableInterrupt()
151 assert(channel < FSL_FEATURE_INTMUX_CHANNEL_COUNT); in INTMUX_GetChannelPendingSources()
A Dfsl_flexio_uart_edma.c128 assert(handle); in FLEXIO_UART_TransferCreateHandleEDMA()
178 assert(handle->txEdmaHandle); in FLEXIO_UART_TransferSendEDMA()
224 assert(handle->rxEdmaHandle); in FLEXIO_UART_TransferReceiveEDMA()
267 assert(handle->txEdmaHandle); in FLEXIO_UART_TransferAbortSendEDMA()
280 assert(handle->rxEdmaHandle); in FLEXIO_UART_TransferAbortReceiveEDMA()
295 assert(handle); in FLEXIO_UART_TransferGetReceiveCountEDMA()
296 assert(handle->rxEdmaHandle); in FLEXIO_UART_TransferGetReceiveCountEDMA()
297 assert(count); in FLEXIO_UART_TransferGetReceiveCountEDMA()
313 assert(handle); in FLEXIO_UART_TransferGetSendCountEDMA()
314 assert(handle->txEdmaHandle); in FLEXIO_UART_TransferGetSendCountEDMA()
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A Dfsl_dmamux.h78 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_EnableChannel()
94 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_DisableChannel()
108 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_SetSource()
124 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_EnablePeriodTrigger()
139 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_DisablePeriodTrigger()
157 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_EnableAlwaysOn()
A Dfsl_edma.c71 assert(tcd != NULL); in EDMA_InstallTCD()
92 assert(config != NULL); in EDMA_Init()
118 assert(config != NULL); in EDMA_GetDefaultConfig()
136 assert(config != NULL); in EDMA_SetTransferConfig()
230 assert(tcd != NULL); in EDMA_TcdReset()
250 assert(tcd != NULL); in EDMA_TcdSetTransferConfig()
290 assert(tcd != NULL); in EDMA_TcdSetMinorOffsetConfig()
305 assert(tcd != NULL); in EDMA_TcdSetChannelLink()
344 assert(tcd != NULL); in EDMA_TcdSetModulo()
355 assert(tcd != NULL); in EDMA_TcdEnableInterrupts()
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A Dfsl_lpspi.c545 assert(handle); in LPSPI_MasterTransferCreateHandle()
758 assert(handle); in LPSPI_MasterTransferNonBlocking()
891 assert(handle); in LPSPI_MasterTransferFillUpTxFifo()
951 assert(handle); in LPSPI_MasterTransferComplete()
966 assert(handle); in LPSPI_MasterTransferGetCount()
998 assert(handle); in LPSPI_MasterTransferAbort()
1012 assert(handle); in LPSPI_MasterTransferHandleIRQ()
1113 assert(handle); in LPSPI_SlaveTransferCreateHandle()
1129 assert(handle); in LPSPI_SlaveTransferNonBlocking()
1271 assert(handle); in LPSPI_SlaveTransferFillUpTxFifo()
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A Dfsl_tpm.c56 assert(instance < tpmArrayCount); in TPM_GetInstance()
63 assert(config); in TPM_Init()
111 assert(config); in TPM_GetDefaultConfig()
145 assert(chnlParams); in TPM_SetupPwm()
146 assert(pwmFreq_Hz); in TPM_SetupPwm()
147 assert(numOfChnls); in TPM_SetupPwm()
148 assert(srcClock_Hz); in TPM_SetupPwm()
515 assert(edgeParam); in TPM_SetupDualEdgeCapture()
608 assert(phaseAParams); in TPM_SetupQuadDecode()
609 assert(phaseBParams); in TPM_SetupQuadDecode()
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A Dfsl_lpadc.c47 assert(instance < ARRAY_SIZE(s_lpadcBases)); in LPADC_GetInstance()
55 assert(config != NULL); in LPADC_Init()
152 assert(result != NULL); /* Check if the input pointer is available. */ in LPADC_GetConvResult()
173 assert(triggerId < ADC_TCTRL_COUNT); /* Check if the triggerId is available in this device. */ in LPADC_SetConvTriggerConfig()
174 assert(config != NULL); /* Check if the input pointer is available. */ in LPADC_SetConvTriggerConfig()
191 assert(config != NULL); /* Check if the input pointer is available. */ in LPADC_GetDefaultConvTriggerConfig()
201 …assert(commandId < (ADC_CMDL_COUNT + 1U)); /* Check if the commandId is available on this device. … in LPADC_SetConvCommandConfig()
202 assert(config != NULL); /* Check if the input pointer is available. */ in LPADC_SetConvCommandConfig()
250 assert(commandId < ADC_CV_COUNT); in LPADC_SetConvCommandConfig()
260 assert(config != NULL); /* Check if the input pointer is available. */ in LPADC_GetDefaultConvCommandConfig()
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A Dfsl_lpspi_edma.c82 assert(rxData); in LPSPI_SeparateEdmaReadData()
142 assert(handle); in LPSPI_MasterTransferCreateHandleEDMA()
163 assert(handle); in LPSPI_MasterTransferEDMA()
164 assert(transfer); in LPSPI_MasterTransferEDMA()
550 assert(handle); in LPSPI_MasterTransferAbortEDMA()
562 assert(handle); in LPSPI_MasterTransferGetCountEDMA()
594 assert(handle); in LPSPI_SlaveTransferCreateHandleEDMA()
615 assert(handle); in LPSPI_SlaveTransferEDMA()
616 assert(transfer); in LPSPI_SlaveTransferEDMA()
971 assert(handle); in LPSPI_SlaveTransferAbortEDMA()
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/bsp/frdm-k64f/device/MK64F12/
A Dfsl_uart_edma.c128 assert(param); in UART_SendEDMACallback()
150 assert(param); in UART_ReceiveEDMACallback()
178 assert(handle); in UART_TransferCreateHandleEDMA()
226 assert(handle); in UART_SendEDMA()
228 assert(xfer); in UART_SendEDMA()
267 assert(handle); in UART_ReceiveEDMA()
269 assert(xfer); in UART_ReceiveEDMA()
308 assert(handle); in UART_TransferAbortSendEDMA()
322 assert(handle); in UART_TransferAbortReceiveEDMA()
338 assert(count); in UART_TransferGetReceiveCountEDMA()
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A Dfsl_flexcan.c439 assert(config); in FLEXCAN_Init()
521 assert(config); in FLEXCAN_GetDefaultConfig()
540 assert(config); in FLEXCAN_SetTimingConfig()
1004 assert(handle); in FLEXCAN_TransferCreateHandle()
1052 assert(handle); in FLEXCAN_TransferSendNonBlocking()
1053 assert(xfer); in FLEXCAN_TransferSendNonBlocking()
1095 assert(handle); in FLEXCAN_TransferReceiveNonBlocking()
1096 assert(xfer); in FLEXCAN_TransferReceiveNonBlocking()
1122 assert(handle); in FLEXCAN_TransferReceiveFifoNonBlocking()
1123 assert(xfer); in FLEXCAN_TransferReceiveFifoNonBlocking()
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A Dfsl_enet.c288 assert(config); in ENET_GetDefaultConfig()
310 assert(handle); in ENET_Init()
311 assert(config); in ENET_Init()
317 assert(macAddr); in ENET_Init()
373 assert(handle); in ENET_SetCallback()
763 assert(handle); in ENET_GetRxErrBeforeReadFrame()
838 assert(handle); in ENET_GetRxFrameSize()
840 assert(length); in ENET_GetRxFrameSize()
890 assert(handle); in ENET_ReadFrame()
1015 assert(data); in ENET_SendFrame()
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A Dfsl_edma.c102 assert(tcd != NULL); in EDMA_InstallTCD()
123 assert(config != NULL); in EDMA_Init()
149 assert(config != NULL); in EDMA_GetDefaultConfig()
167 assert(config != NULL); in EDMA_SetTransferConfig()
261 assert(tcd != NULL); in EDMA_TcdReset()
281 assert(tcd != NULL); in EDMA_TcdSetTransferConfig()
321 assert(tcd != NULL); in EDMA_TcdSetMinorOffsetConfig()
336 assert(tcd != NULL); in EDMA_TcdSetChannelLink()
375 assert(tcd != NULL); in EDMA_TcdSetModulo()
386 assert(tcd != NULL); in EDMA_TcdEnableInterrupts()
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A Dfsl_sysmpu.c47 assert(config); in SYSMPU_Init()
88 assert(hardwareInform); in SYSMPU_GetHardwareInfo()
99 assert(regionConfig); in SYSMPU_SetRegionConfig()
147 assert(regionNum < FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT); in SYSMPU_SetRegionAddr()
158 assert(accessRights); in SYSMPU_SetRegionRwxMasterAccessRights()
159 assert(regionNum < FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT); in SYSMPU_SetRegionRwxMasterAccessRights()
160 assert(masterNum < SYSMPU_MASTER_RWATTRIBUTE_START_PORT); in SYSMPU_SetRegionRwxMasterAccessRights()
187 assert(accessRights); in SYSMPU_SetRegionRwMasterAccessRights()
188 assert(regionNum < FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT); in SYSMPU_SetRegionRwMasterAccessRights()
189 assert(masterNum >= SYSMPU_MASTER_RWATTRIBUTE_START_PORT); in SYSMPU_SetRegionRwMasterAccessRights()
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A Dfsl_cmt.h251 assert(highCount <= CMT_CGH1_PH_MASK); in CMT_SetCarrirGenerateCountOne()
252 assert(highCount); in CMT_SetCarrirGenerateCountOne()
253 assert(lowCount <= CMT_CGL1_PL_MASK); in CMT_SetCarrirGenerateCountOne()
254 assert(lowCount); in CMT_SetCarrirGenerateCountOne()
277 assert(highCount <= CMT_CGH2_SH_MASK); in CMT_SetCarrirGenerateCountTwo()
278 assert(highCount); in CMT_SetCarrirGenerateCountTwo()
279 assert(lowCount <= CMT_CGL2_SL_MASK); in CMT_SetCarrirGenerateCountTwo()
280 assert(lowCount); in CMT_SetCarrirGenerateCountTwo()
A Dfsl_dmamux.h100 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_EnableChannel()
116 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_DisableChannel()
130 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_SetSource()
146 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_EnablePeriodTrigger()
161 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_DisablePeriodTrigger()
179 assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL); in DMAMUX_EnableAlwaysOn()
A Dfsl_uart.c176 assert(handle); in UART_TransferGetRxRingBufferLength()
194 assert(handle); in UART_TransferIsRxRingBufferFull()
212 assert(config); in UART_Init()
349 assert(config); in UART_GetDefaultConfig()
558 assert(data); in UART_WriteNonBlocking()
572 assert(data); in UART_ReadBlocking()
614 assert(data); in UART_ReadNonBlocking()
714 assert(xfer); in UART_TransferSendNonBlocking()
754 assert(count); in UART_TransferGetSendCount()
772 assert(xfer); in UART_TransferReceiveNonBlocking()
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A Dfsl_pdb.h340 assert(0U == (mask & ~(PDB_SC_PDBEIE_MASK | PDB_SC_PDBIE_MASK))); in PDB_EnableInterrupts()
353 assert(0U == (mask & ~(PDB_SC_PDBEIE_MASK | PDB_SC_PDBIE_MASK))); in PDB_DisableInterrupts()
378 assert(0U == (mask & ~PDB_SC_PDBIF_MASK)); in PDB_ClearStatusFlags()
432 assert(channel < PDB_C1_COUNT); in PDB_SetADCPreTriggerConfig()
433 assert(NULL != config); in PDB_SetADCPreTriggerConfig()
452 assert(channel < PDB_C1_COUNT); in PDB_SetADCPreTriggerDelayValue()
453 assert(preChannel < PDB_DLY_COUNT2); in PDB_SetADCPreTriggerDelayValue()
469 assert(channel < PDB_C1_COUNT); in PDB_GetADCPreTriggerStatusFlags()
483 assert(channel < PDB_C1_COUNT); in PDB_ClearADCPreTriggerStatusFlags()
517 assert(channel < PDB_INT_COUNT); in PDB_SetDACTriggerIntervalValue()
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A Dfsl_rtc.c77 assert(datetime); in RTC_CheckDatetimeFormat()
109 assert(datetime); in RTC_ConvertDatetimeToSeconds()
139 assert(datetime); in RTC_ConvertSecondsToDatetime()
210 assert(config); in RTC_Init()
241 assert(config); in RTC_GetDefaultConfig()
257 assert(datetime); in RTC_SetDatetime()
273 assert(datetime); in RTC_GetDatetime()
283 assert(alarmTime); in RTC_SetAlarm()
313 assert(datetime); in RTC_GetAlarm()
352 assert(counter); in RTC_GetMonotonicCounter()
/bsp/allwinner/libraries/sunxi-hal/include/hal/sdmmc/sys/
A Dsys_debug.h149 #define _R_ASSERT(assert, module, dlevel, msg, arg...) \ argument
150 _R_DEBUG(module, dlevel, !(assert), \
217 #define R_ASSERT(assert, module, msg, arg...) \ argument
218 _R_ASSERT(assert, module, R_LEVEL_ALL, msg, ##arg)
220 #define R_ASSERT_ABORT(assert, module, msg, arg...) \ argument
230 #ifndef assert
272 #define _R_ASSERT(assert, module, dlevel, msg, arg...) argument
294 #define R_ASSERT(assert, module, msg, arg...) argument
296 #define R_ASSERT_ABORT(assert, module, msg, arg...) argument
298 #ifndef assert
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/bsp/allwinner/libraries/sunxi-hal/hal/source/sound/component/aw-alsa-lib/
A Dpcm.c120 assert(pcm); in snd_pcm_link_hw_ptr()
121 assert(slave); in snd_pcm_link_hw_ptr()
127 assert(pcm); in snd_pcm_link_appl_ptr()
134 assert(pcm); in snd_pcm_unlink_hw_ptr()
141 assert(pcm); in snd_pcm_unlink_appl_ptr()
150 assert(pcm); in snd_pcm_set_hw_ptr()
159 assert(pcm); in snd_pcm_set_appl_ptr()
206 assert(pcm); in snd_pcm_close()
229 assert(ptr); in snd_pcm_hw_params_malloc()
243 assert(pcm); in snd_pcm_hw_params_any()
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A Dpcm_hw.c57 assert(pcm); in snd_pcm_hw_hw_refine()
81 assert(pcm); in snd_pcm_hw_hw_free()
183 assert(pcm); in snd_pcm_hw_prepare()
195 assert(pcm); in snd_pcm_hw_reset()
205 assert(pcm); in snd_pcm_hw_start()
217 assert(pcm); in snd_pcm_hw_drop()
229 assert(pcm); in snd_pcm_hw_drain()
242 assert(pcm); in snd_pcm_hw_pause()
254 assert(pcm); in snd_pcm_hw_delay()
266 assert(pcm); in snd_pcm_hw_resume()
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/bsp/rv32m1_vega/rv32m1_sdk_riscv/sdmmc_2.1.2/src/
A Dfsl_sd.c309 assert(card); in SD_SelectCard()
316 assert(card); in SD_SendApplicationCmd()
323 assert(card); in SD_GoIdle()
330 assert(card); in SD_SetBlockSize()
337 assert(card); in SD_ExecuteTuning()
344 assert(card); in SD_SwitchVoltage()
399 assert(card); in SD_WaitWriteComplete()
430 assert(card); in SD_StopTransmission()
453 assert(card); in SD_SendRca()
475 assert(card); in SD_SwitchFunction()
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/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_lobs_drv.c26 assert((config->start_addr & 0x03) == 0); in lobs_ctrl_config()
27 assert((config->end_addr & 0x03) == 0); in lobs_ctrl_config()
45 assert(config->sig_group_num < 12); in lobs_two_group_mode_config()
74 assert(config->sig_group_num < 12); in lobs_state_config()
75 assert((config->cmp_sig_en[0] && (config->cmp_sig_bit[0] < 128)) || (!config->cmp_sig_en[0])); in lobs_state_config()
76 assert((config->cmp_sig_en[1] && (config->cmp_sig_bit[1] < 128)) || (!config->cmp_sig_en[1])); in lobs_state_config()
77 assert((config->cmp_sig_en[2] && (config->cmp_sig_bit[2] < 128)) || (!config->cmp_sig_en[2])); in lobs_state_config()
78 assert((config->cmp_sig_en[3] && (config->cmp_sig_bit[3] < 128)) || (!config->cmp_sig_en[3])); in lobs_state_config()
79 …assert(((config->cmp_mode == lobs_cnt_cmp_mode) && (config->state_chg_condition == lobs_cnt_matche… in lobs_state_config()
95 assert(0); in lobs_state_config()
/bsp/nxp/imx/imxrt/imxrt1170-nxp-evk/video/display/dc/elcdif/
A Dfsl_dc_fb_elcdif.c121 assert(layer < DC_FB_ELCDIF_MAX_LAYER); in DC_FB_ELCDIF_EnableLayer()
147 assert(layer < DC_FB_ELCDIF_MAX_LAYER); in DC_FB_ELCDIF_DisableLayer()
163 assert(layer < DC_FB_ELCDIF_MAX_LAYER); in DC_FB_ELCDIF_SetLayerConfig()
170 assert(fbInfo->startX == 0U); in DC_FB_ELCDIF_SetLayerConfig()
171 assert(fbInfo->startY == 0U); in DC_FB_ELCDIF_SetLayerConfig()
172 assert(fbInfo->width == dcHandle->width); in DC_FB_ELCDIF_SetLayerConfig()
173 assert(fbInfo->height == dcHandle->height); in DC_FB_ELCDIF_SetLayerConfig()
174 … assert(fbInfo->strideBytes == VIDEO_GetPixelSizeBits(fbInfo->pixelFormat) * dcHandle->width / 8U); in DC_FB_ELCDIF_SetLayerConfig()
189 assert(layer < DC_FB_ELCDIF_MAX_LAYER); in DC_FB_ELCDIF_GetLayerDefaultConfig()
205 assert(layer < DC_FB_ELCDIF_MAX_LAYER); in DC_FB_ELCDIF_SetFrameBuffer()
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