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/libcpu/ppc/ppc405/
A Dcache_gcc.S3 #define DCACHE_SIZE (16 << 10)/* For AMCC 405 CPUs */ macro
135 lis r7,(DCACHE_SIZE / L1_CACHE_BYTES / 2)@ha /* TBS for large sized cache */
136 ori r7,r7,(DCACHE_SIZE / L1_CACHE_BYTES / 2)@l

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