Home
last modified time | relevance | path

Searched refs:GET_GICV3_REG (Results 1 – 2 of 2) sorted by relevance

/libcpu/aarch64/common/
A Dgicv3.c54 GET_GICV3_REG(ICC_IAR1_EL1, irq); in arm_gic_get_active_irq()
332 GET_GICV3_REG(ICC_SRE_EL1, value); in arm_gic_get_system_register_enable_mask()
350 GET_GICV3_REG(ICC_PMR_EL1, priority); in arm_gic_get_interface_prior_mask()
367 GET_GICV3_REG(ICC_BPR1_EL1, binary_point); in arm_gic_get_binary_point()
505 GET_GICV3_REG(ICC_HPPIR1_EL1, irq); in arm_gic_get_high_pending_irq()
/libcpu/aarch64/common/include/
A Dgicv3.h28 #define GET_GICV3_REG(reg, out) __asm__ volatile ("mrs %0, " reg:"=r"(out)::"memory"); macro

Completed in 5 milliseconds