Home
last modified time | relevance | path

Searched refs:a2 (Results 1 – 17 of 17) sorted by relevance

/libcpu/aarch64/common/include/
A Dsmccc.h21 unsigned long a2; member
35 void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
40 void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
/libcpu/risc-v/common64/
A Dsyscall_c.c56 regs->a0, regs->a1, regs->a2, regs->a3, regs->a4, regs->a5, regs->a6); in syscall_handler()
57 regs->a0 = syscallfunc(regs->a0, regs->a1, regs->a2, regs->a3, regs->a4, regs->a5, regs->a6); in syscall_handler()
A Dstack.h40 rt_ubase_t a2; /* x12 - a2 - function argument 2 */ member
A Dsbi.h152 register uintptr_t a2 __asm("a2") = (uintptr_t)(arg2); in sbi_call()
161 : "r"(a2), "r"(a3), "r"(a4), "r"(a6), "r"(a7) \ in sbi_call()
A Dinterrupt_gcc.S57 csrr a2, sepc
A Dtrap.c55 rt_kprintf("\ta2(x12) = %p\ta3(x13) = %p\n", regs->a2, regs->a3); in dump_regs()
/libcpu/mips/gs232/
A Dcache_gcc.S80 addu a2, $0, t6
82 #a0=0x80000000, a1=icache_size, a2=dcache_size
86 addu v1, a0, a2
117 addu v1, a0, a2
/libcpu/mips/common/
A Dmips.inc20 #define a2 $6
A Dmips_regs.h27 #define a2 $6 macro
68 #define a2 $6 macro
/libcpu/risc-v/common/
A Drt_hw_stack_frame.h30 rt_ubase_t a2; /* x12 - a2 - function argument 2 */ member
A Dtrap_common.c98 rt_kprintf("a2 : 0x%08x\r\n", s_stack_frame->a2); in rt_show_stack_frame()
A Dreadme.md130 mv a2, sp
A Dcontext_gcc.S187 mv a0, a2
207 LOAD sp, 0(a2)
A Dinterrupt_gcc.S322 mv a2, s0
/libcpu/ti-dsp/c6x/
A Dc66xx.h69 RT_REG_PAIR(a3, a2);
A Dstack.c101 thread_context->hw_register.a2 = 0xA02; in rt_hw_stack_init()
A Dtrap.c47 regs->hw_register.a2, regs->hw_register.b2); in show_regs()

Completed in 18 milliseconds