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Searched refs:i (Results 1 – 25 of 70) sorted by relevance

123

/libcpu/arm/s3c24x0/
A Dmmu.c57 i |= 0x1; in mmu_enable()
70 i &= ~0x1; in mmu_disable()
83 i |= (1 << 12); in mmu_enable_icache()
96 i |= (1 << 2); in mmu_enable_dcache()
109 i &= ~(1 << 12); in mmu_disable_icache()
122 i &= ~(1 << 2); in mmu_disable_dcache()
135 i |= (1 << 1); in mmu_enable_alignfault()
148 i &= ~(1 << 1); in mmu_disable_alignfault()
321 for(i=0;i<=nSec;i++) in mmu_setmtt()
330 int i,j; in rt_hw_mmu_init() local
[all …]
/libcpu/arm/am335x/
A Dmmu.c21 extern void rt_cpu_tlb_set(register rt_uint32_t i);
53 void mmu_setttbase(register rt_uint32_t i) in mmu_setttbase() argument
68 rt_cpu_tlb_set(i); in mmu_setttbase()
71 void mmu_set_domain(register rt_uint32_t i) in mmu_set_domain() argument
78 register rt_uint32_t i; in mmu_enable_alignfault() local
83 i |= (1 << 1); in mmu_enable_alignfault()
91 register rt_uint32_t i; in mmu_disable_alignfault() local
96 i &= ~(1 << 1); in mmu_disable_alignfault()
148 int i,nSec; in mmu_setmtt() local
151 for(i=0;i<=nSec;i++) in mmu_setmtt()
[all …]
A Dcpu.c28 rt_uint32_t i; in cp15_rd() local
32 mrc p15, 0, i, c1, c0, 0 in cp15_rd()
35 return i; in cp15_rd()
64 rt_uint32_t i; in cp15_rd() local
66 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); in cp15_rd()
67 return i; in cp15_rd()
94 rt_uint32_t i; in cp15_rd() local
96 __asm volatile("mrc p15, 0, %0, c1, c0, 0":"=r" (i)); in cp15_rd()
97 return i; in cp15_rd()
/libcpu/arm/dm36x/
A Dmmu.c261 i |= 0x1; in mmu_enable()
264 i |= (1 << 8); in mmu_enable()
265 i &= ~(1 << 9); in mmu_enable()
278 i &= ~0x1; in mmu_disable()
291 i |= (1 << 12); in mmu_enable_icache()
304 i |= (1 << 2); in mmu_enable_dcache()
330 i &= ~(1 << 2); in mmu_disable_dcache()
343 i |= (1 << 1); in mmu_enable_alignfault()
437 for(i = 0; i <= nSec; i++) in mmu_create_pgd()
448 int i; in mmu_create_pte() local
[all …]
/libcpu/arm/armv6/
A Dmmu.c261 i |= 0x1; in mmu_enable()
278 i &= ~0x1; in mmu_disable()
291 i |= (1 << 12); in mmu_enable_icache()
304 i |= (1 << 2); in mmu_enable_dcache()
317 i &= ~(1 << 12); in mmu_disable_icache()
330 i &= ~(1 << 2); in mmu_disable_dcache()
343 i |= (1 << 1); in mmu_enable_alignfault()
356 i &= ~(1 << 1); in mmu_disable_alignfault()
438 for(i = 0; i <= nSec; i++) in mmu_create_pgd()
449 int i; in mmu_create_pte() local
[all …]
/libcpu/ia32/
A Dtrap.c42 int i, j, func; in rt_hw_idt_init() local
45 for (i = 0; i < sizeof(idt)/sizeof(idt[0]); i++) in rt_hw_idt_init()
46 SETGATE(idt[i], 0, GD_KT, &Xdefault, 0); in rt_hw_idt_init()
49 for(i = 0; i < 16; i++) in rt_hw_idt_init()
51 func = (int)trap_func[i]; in rt_hw_idt_init()
52 SETGATE(idt[i], 0, GD_KT, func, 0); in rt_hw_idt_init()
58 i = 0; in rt_hw_idt_init()
63 func = (int)hdinterrupt_func[i]; in rt_hw_idt_init()
65 i++; in rt_hw_idt_init()
/libcpu/arm/realview-a8-vmm/
A Dmmu.c49 int i; in rt_hw_cpu_dump_page_table_2nd() local
52 for (i = 0; i < 256; i++) in rt_hw_cpu_dump_page_table_2nd()
54 rt_uint32_t pte2 = ptb[i]; in rt_hw_cpu_dump_page_table_2nd()
59 rt_kprintf("%04x: ", i); in rt_hw_cpu_dump_page_table_2nd()
93 int i; in rt_hw_cpu_dump_page_table() local
97 for (i = 0; i < 1024*4; i++) in rt_hw_cpu_dump_page_table()
99 rt_uint32_t pte1 = ptb[i]; in rt_hw_cpu_dump_page_table()
102 rt_kprintf("%03x: ", i); in rt_hw_cpu_dump_page_table()
117 rt_kprintf("%03x: %08x: ", i, pte1); in rt_hw_cpu_dump_page_table()
161 volatile int i, nSec; in rt_hw_mmu_setmtt() local
[all …]
A Dgic.c158 unsigned int i, k; in arm_gic_dump() local
163 for (i = 0; i < _gic_max_irq / 32; i++) in arm_gic_dump()
170 for (i = 0; i < _gic_max_irq / 32; i++) in arm_gic_dump()
177 for (i = 0; i < _gic_max_irq / 32; i++) in arm_gic_dump()
192 unsigned int gic_type, i; in arm_gic_dist_init() local
227 for (i = 32; i < _gic_max_irq; i += 16) in arm_gic_dist_init()
228 GIC_DIST_CONFIG(dist_base, i) = 0x0; in arm_gic_dist_init()
231 for (i = 32; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
235 for (i = 0; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
239 for (i = 0; i < _gic_max_irq; i += 32) in arm_gic_dist_init()
[all …]
/libcpu/arm/s3c44b0/
A Dinterrupt.c45 register int i; in rt_hw_interrupt_init() local
60 for(i=0; i<MAX_HANDLERS; i++) in rt_hw_interrupt_init()
62 isr_table[i] = rt_hw_interrupt_handle; in rt_hw_interrupt_init()
65 for ( i = 0; i < 256; i++) in rt_hw_interrupt_init()
67 interrupt_bank0[i] = 0; in rt_hw_interrupt_init()
68 interrupt_bank1[i] = 0; in rt_hw_interrupt_init()
69 interrupt_bank2[i] = 0; in rt_hw_interrupt_init()
70 interrupt_bank3[i] = 0; in rt_hw_interrupt_init()
A Dcpu.c27 volatile int i; in rt_hw_cpu_icache_enable() local
29 for(i = 0x10002000; i < 0x10004800; i+=16) in rt_hw_cpu_icache_enable()
31 *((int *)i)=0x0; in rt_hw_cpu_icache_enable()
/libcpu/aarch64/common/
A Dgicv3.c400 for (i = 0; i < sgi_aff_table_num; i++) in sgi_aff_add_table()
418 for (i = 0; i < RT_CPUS_NR; i++) in gicv3_sgi_init()
433 for (i = 0; i < sgi_aff_table_num; i++) in gicv3_sgi_send()
450 for (i = 0; i < sgi_aff_table_num; i++) in gicv3_sgi_target_list_set()
477 for (i = 0; i < masks_nrs; i++) in arm_gic_send_affinity_sgi()
641 for (i = 32; i < _gic_max_irq; i++) in arm_gic_dist_init()
649 for (i = 32; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
656 for (i = 0; i < _gic_max_irq; i += 32) in arm_gic_dist_init()
664 for (i = 0; i < _gic_max_irq; i += 32) in arm_gic_dist_init()
728 for (i = 0; i < 32; i += 4) in arm_gic_redist_init()
[all …]
A Dcpu.c163 for (int i = 0; i < num_cpus; i++) in _cpus_init_data_hardcoded() local
165 set_hwid(i, cpu_hw_ids[i]); in _cpus_init_data_hardcoded()
166 cpu_ops_tbl[i] = cpu_ops[i]; in _cpus_init_data_hardcoded()
189 for (int i = 1; i < RT_CPUS_NR; i++) in _cpus_init() local
191 if (rt_cpu_mpidr_early[i] == ID_ERROR) in _cpus_init()
193 LOG_E("Failed to find hardware id of CPU %d", i); in _cpus_init()
197 if (cpu_ops_tbl[i] && cpu_ops_tbl[i]->cpu_init) in _cpus_init()
199 retval = cpu_ops_tbl[i]->cpu_init(i, RT_NULL); in _cpus_init()
205 … , rt_cpu_mpidr_early[i], cpu_ops_tbl[i], cpu_ops_tbl[i] ? cpu_ops_tbl[i]->cpu_init : NULL); in _cpus_init()
/libcpu/arm/cortex-m7/
A Dmpu.c221 rt_uint8_t i; in rt_hw_mpu_table_switch() local
225 for (i = 0U; i < NUM_DYNAMIC_REGIONS; i++) in rt_hw_mpu_table_switch()
234 for (i = 0U; i < NUM_EXCLUSIVE_REGIONS; i++) in rt_hw_mpu_table_switch()
236 if ((exclusive_regions[i].owner != RT_NULL) && (exclusive_regions[i].owner != thread)) in rt_hw_mpu_table_switch()
238 …gion(ARM_MPU_RBAR(index, (rt_uint32_t)(exclusive_regions[i].region.start)), exclusive_regions[i].r… in rt_hw_mpu_table_switch()
253 rt_int8_t i; in MemManage_Handler() local
259 for (i = NUM_EXCLUSIVE_REGIONS - 1; i >= 0; i--) in MemManage_Handler()
261 …ons[i].owner != RT_NULL) && ((exclusive_regions[i].owner != rt_thread_self())) && ADDR_IN_REGION(i… in MemManage_Handler()
271 for (i = NUM_DYNAMIC_REGIONS - 1; i >= 0; i--) in MemManage_Handler()
273 …t *)info.thread->mem_regions)[i].size != 0U) && ADDR_IN_REGION(info.addr, &(((rt_mem_region_t *)in… in MemManage_Handler()
[all …]
/libcpu/mips/common/
A Dstack.c25 rt_uint32_t i; in rt_hw_stack_init() local
33 for (i = 0; i < 8; ++i) in rt_hw_stack_init()
35 pt->pad0[i] = 0xdeadbeef; in rt_hw_stack_init()
39 for (i = 0; i < 32; ++i) in rt_hw_stack_init()
41 pt->regs[i] = 0xdeadbeef; in rt_hw_stack_init()
A Dexception.c100 int i, j; in mips_dump_regs() local
101 for (i = 0; i < 32 / 4; i++) in mips_dump_regs()
105 int reg = 4 * i + j; in mips_dump_regs()
141 rt_int32_t i; in install_default_exception_handler() local
143 for (i = 0; i < RT_EXCEPTION_MAX; i++) in install_default_exception_handler()
144 sys_exception_handlers[i] = in install_default_exception_handler()
/libcpu/arm/cortex-m33/
A Dmpu.c277 rt_uint8_t i; in rt_hw_mpu_table_switch() local
281 for (i = 0U; i < NUM_DYNAMIC_REGIONS; i++) in rt_hw_mpu_table_switch()
285 …index, ((rt_mem_region_t *)thread->mem_regions)[i].attr.rbar, ((rt_mem_region_t *)thread->mem_regi… in rt_hw_mpu_table_switch()
290 for (i = 0U; i < NUM_EXCLUSIVE_REGIONS; i++) in rt_hw_mpu_table_switch()
292 if ((exclusive_regions[i].owner != RT_NULL) && (exclusive_regions[i].owner != thread)) in rt_hw_mpu_table_switch()
294 …ARM_MPU_SetRegion(index, exclusive_regions[i].region.attr.rbar, exclusive_regions[i].region.attr.r… in rt_hw_mpu_table_switch()
309 rt_int8_t i; in MemManage_Handler() local
315 for (i = NUM_EXCLUSIVE_REGIONS - 1; i >= 0; i--) in MemManage_Handler()
317 …ons[i].owner != RT_NULL) && ((exclusive_regions[i].owner != rt_thread_self())) && ADDR_IN_REGION(i… in MemManage_Handler()
327 for (i = NUM_DYNAMIC_REGIONS - 1; i >= 0; i--) in MemManage_Handler()
[all …]
/libcpu/arm/lpc24xx/
A Dinterrupt.c38 register int i; in rt_hw_interrupt_init() local
49 for(i=0; i < MAX_HANDLERS; i++) in rt_hw_interrupt_init()
51 irq_desc[i].handler = rt_hw_interrupt_handler; in rt_hw_interrupt_init()
53 vect_addr = (rt_uint32_t *)(VIC_BASE_ADDR + 0x100 + i*4); in rt_hw_interrupt_init()
54 vect_cntl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + i*4); in rt_hw_interrupt_init()
55 *vect_addr = (rt_uint32_t)&irq_desc[i]; in rt_hw_interrupt_init()
/libcpu/arm/cortex-r4/
A Dinterrupt.c46 register int i; in rt_hw_interrupt_init() local
54 for(i=0; i < MAX_HANDLERS; i++) in rt_hw_interrupt_init()
56 irq_desc[i].handler = rt_hw_int_not_handle; in rt_hw_interrupt_init()
58 vect_addr = (rt_uint32_t *)(vimRAM + i*4); in rt_hw_interrupt_init()
59 *vect_addr = (rt_uint32_t)&irq_desc[i]; in rt_hw_interrupt_init()
/libcpu/mips/gs232/
A Dinterrupt.c47 rt_int32_t i; in rt_hw_interrupt_init() local
50 for (i=0; i < GS232_INTC_CELLS; i++) in rt_hw_interrupt_init()
53 (gs232_hw0_icregs+i)->int_en = 0x0; in rt_hw_interrupt_init()
55 (gs232_hw0_icregs+i)->int_pol = -1; /* Must be done here */ in rt_hw_interrupt_init()
57 (gs232_hw0_icregs+i)->int_edge = 0x00000000; in rt_hw_interrupt_init()
59 (gs232_hw0_icregs+i)->int_clr = 0xffffffff; in rt_hw_interrupt_init()
60 mips_unmask_cpu_irq(i + 2); in rt_hw_interrupt_init()
/libcpu/arm/cortex-r52/
A Dgicv3.c482 for (i = 32U; i < _gic_max_irq; i += 16U) in arm_gic_dist_init()
489 for (i = 32U; i < _gic_max_irq; i++) in arm_gic_dist_init()
498 for (i = 32U; i < _gic_max_irq; i += 4U) in arm_gic_dist_init()
503 for (i = 0U; i < _gic_max_irq; i += 32U) in arm_gic_dist_init()
511 for (i = 0U; i < _gic_max_irq; i += 32U) in arm_gic_dist_init()
551 unsigned int i; in arm_gic_redist_init() local
580 for (i = 0; i < 32; i += 4) in arm_gic_redist_init()
648 unsigned int i, k; in arm_gic_dump() local
653 for (i = 0U; i < _gic_max_irq / 32U; i++) in arm_gic_dump()
660 for (i = 0U; i < _gic_max_irq / 32U; i++) in arm_gic_dump()
[all …]
/libcpu/risc-v/virt64/
A Dplic.c124 for (size_t i = hartid * WORD_CNT_BYTE; i < 32; i++) in _set_sie() local
125 plic_set_ie(i, 0xffffffff); in _set_sie()
135 for (int i = 0; i < CONFIG_IRQ_NR; i++) in plic_init() local
137 plic_set_priority(i, 1); in plic_init()
/libcpu/arm/cortex-a/
A Dgic.c372 unsigned int gic_type, i; in arm_gic_dist_init() local
401 for (i = 32U; i < _gic_max_irq; i += 16U) in arm_gic_dist_init()
405 for (i = 32U; i < _gic_max_irq; i += 4U) in arm_gic_dist_init()
409 for (i = 0U; i < _gic_max_irq; i += 4U) in arm_gic_dist_init()
413 for (i = 0U; i < _gic_max_irq; i += 32U) in arm_gic_dist_init()
418 for (i = 0; i < _gic_max_irq; i += 32) in arm_gic_dist_init()
421 for (i = 0U; i < _gic_max_irq; i += 32U) in arm_gic_dist_init()
463 unsigned int i, k; in arm_gic_dump() local
468 for (i = 0U; i < _gic_max_irq / 32U; i++) in arm_gic_dump()
475 for (i = 0U; i < _gic_max_irq / 32U; i++) in arm_gic_dump()
[all …]
A Dgicv3.c516 for (i = 32U; i < _gic_max_irq; i += 16U) in arm_gic_dist_init()
523 for (i = 32U; i < _gic_max_irq; i++) in arm_gic_dist_init()
532 for (i = 32U; i < _gic_max_irq; i += 4U) in arm_gic_dist_init()
537 for (i = 0U; i < _gic_max_irq; i += 32U) in arm_gic_dist_init()
545 for (i = 0U; i < _gic_max_irq; i += 32U) in arm_gic_dist_init()
585 unsigned int i; in arm_gic_redist_init() local
612 for (i = 0; i < 32; i += 4) in arm_gic_redist_init()
673 unsigned int i, k; in arm_gic_dump() local
678 for (i = 0U; i < _gic_max_irq / 32U; i++) in arm_gic_dump()
685 for (i = 0U; i < _gic_max_irq / 32U; i++) in arm_gic_dump()
[all …]
/libcpu/arm/zynqmp-r5/
A Dgic.c133 unsigned int gic_type, i; in arm_gic_dist_init() local
161 for (i = 32; i < _gic_max_irq; i += 16) in arm_gic_dist_init()
162 GIC_DIST_CONFIG(dist_base, i) = 0x0; in arm_gic_dist_init()
165 for (i = 32; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
166 GIC_DIST_TARGET(dist_base, i) = cpumask; in arm_gic_dist_init()
169 for (i = 0; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
170 GIC_DIST_PRI(dist_base, i) = 0xa0a0a0a0; in arm_gic_dist_init()
173 for (i = 0; i < _gic_max_irq; i += 32) in arm_gic_dist_init()
174 GIC_DIST_ENABLE_CLEAR(dist_base, i) = 0xffffffff; in arm_gic_dist_init()
/libcpu/ppc/ppc405/
A Dtraps.c41 unsigned long i; in print_backtrace() local
48 i = sp[1]; in print_backtrace()
51 rt_kprintf("%08lX ", i); in print_backtrace()
60 int i; in show_regs() local
71 for (i = 0; i < 32; i++) { in show_regs()
72 if ((i % 8) == 0) { in show_regs()
73 rt_kprintf("GPR%02d: ", i); in show_regs()
76 rt_kprintf("%08lX ", regs->gpr[i]); in show_regs()
77 if ((i % 8) == 7) { in show_regs()

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