| /libcpu/arm/am335x/ |
| A D | start_iar.s | 16 MODE_MSK DEFINE 0x1F ; Bit mask for mode bits in CPSR
20 USR_MODE DEFINE 0x10 ; User mode
21 FIQ_MODE DEFINE 0x11 ; Fast Interrupt Request mode
22 IRQ_MODE DEFINE 0x12 ; Interrupt Request mode
23 SVC_MODE DEFINE 0x13 ; Supervisor mode
24 ABT_MODE DEFINE 0x17 ; Abort mode
25 UND_MODE DEFINE 0x1B ; Undefined Instruction mode
26 SYS_MODE DEFINE 0x1F ; System mode
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| /libcpu/arm/arm926/ |
| A D | start_iar.S | 122 ; Set the cpu to SVC32 mode
142 ; Setup Stack for each mode
147 MSR CPSR_cxsf, R1 ; Undef mode
151 MSR CPSR_cxsf,R1 ; Abort mode
155 MSR CPSR_cxsf,R1 ; IRQ mode
159 MSR CPSR_cxsf,R1 ; FIQ mode
163 MSR CPSR_cxsf,R1 ; SYS/User mode
167 MSR CPSR_cxsf,R1 ; SVC mode
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| A D | start_rvds.S | 112 ; set the cpu to SVC32 mode
132 ; Setup Stack for each mode
137 MSR CPSR_cxsf, R1 ; Undef mode
141 MSR CPSR_cxsf,R1 ; Abort mode
145 MSR CPSR_cxsf,R1 ; IRQ mode
149 MSR CPSR_cxsf,R1 ; FIQ mode
153 MSR CPSR_cxsf,R1 ; SYS/User mode
157 MSR CPSR_cxsf,R1 ; SVC mode
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| /libcpu/arm/cortex-r52/ |
| A D | interrupt.c | 137 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode) in rt_hw_interrupt_set_triger_mode() argument
139 arm_gic_set_configuration(0, vector, mode); in rt_hw_interrupt_set_triger_mode()
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| A D | interrupt.h | 34 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode);
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| A D | context_gcc.S | 195 @ mode so there is no need to update SP.
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| A D | context_iar.S | 203 ; mode so there is no need to update SP.
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| /libcpu/arm/cortex-a/ |
| A D | interrupt.h | 36 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode);
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| A D | interrupt.c | 179 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode) in rt_hw_interrupt_set_triger_mode() argument
181 arm_gic_set_configuration(0, vector, mode & IRQ_MODE_MASK); in rt_hw_interrupt_set_triger_mode()
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| A D | trap.c | 35 uint32_t mode = regs->cpsr; in check_user_fault() local
37 if ((mode & 0x1f) == 0x10) in check_user_fault()
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| /libcpu/aarch64/common/include/ |
| A D | interrupt.h | 36 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode);
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| /libcpu/arm/sep4020/ |
| A D | start_rvds.S | 98 ; Absolute addressing mode must be used.
129 DeadLoop BHI DeadLoop ; Abort happened in irq mode, halt system.
193 MSR cpsr_c, R4 ;SYSTEM mode, @32-bit code mode
332 ; switch to SVC mode and no interrupt
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| /libcpu/arm/AT91SAM7X/ |
| A D | start_rvds.S | 29 ; 2009-12-28 MingBai Bug fix (USR mode stack removed).
219 ; Absolute addressing mode must be used.
362 ; Setup Stack for each mode
399 ; No usr mode stack here.
427 DeadLoop BHI DeadLoop ; Abort happened in irq mode, halt system.
468 ; switch to SVC mode and no interrupt
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| /libcpu/aarch64/common/ |
| A D | interrupt.c | 229 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode) in rt_hw_interrupt_set_triger_mode() argument
231 arm_gic_set_configuration(0, vector, mode & IRQ_MODE_MASK); in rt_hw_interrupt_set_triger_mode()
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| /libcpu/arm/realview-a8-vmm/ |
| A D | start_gcc.S | 168 @ Switch to SVC mode with no interrupt. If the usr mode guest is
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| /libcpu/arm/AT91SAM7S/ |
| A D | start_rvds.S | 216 ; Absolute addressing mode must be used.
359 ; Setup Stack for each mode
396 ; No usr mode stack here.
450 ; switch to SVC mode and no interrupt
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| /libcpu/arm/lpc214x/ |
| A D | start_rvds.S | 236 ; Absolute addressing mode must be used.
369 ; Setup Stack for each mode
399 ; RT-Thread does not use user mode
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| A D | context_rvds.S | 133 ; switch to SVC mode and no interrupt
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| /libcpu/arm/cortex-r4/ |
| A D | start_ccs.asm | 17 ; After reset, the CPU is in the Supervisor mode (M = 10011)
34 ; Switch to FIQ mode (M = 10001)
44 ; Switch to IRQ mode (M = 10010)
49 ; Switch to Abort mode (M = 10111)
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| A D | context_ccs.asm | 204 ; mode so there is no need to update SP.
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| A D | context_gcc.S | 198 @ mode so there is no need to update SP.
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| /libcpu/arm/s3c44b0/ |
| A D | start_rvds.S | 756 ; Absolute addressing mode must be used.
932 ; Setup Stack for each mode
1022 ; switch to SVC mode and no interrupt
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| A D | start_gcc.S | 233 mov pc,lr @ The LR register may be not valid for the mode changes.
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| /libcpu/arm/s3c24x0/ |
| A D | start_rvds.S | 843 ; Absolute addressing mode must be used.
1058 ; Setup Stack for each mode ----------------------------------------------------
1139 ; switch to SVC mode and no interrupt
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| /libcpu/arm/lpc24xx/ |
| A D | start_rvds.S | 1057 ; Absolute addressing mode must be used.
1095 ; switch to SVC mode and no interrupt
1512 ; Setup Stack for each mode ----------------------------------------------------
1593 ; switch to SVC mode and no interrupt
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