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Searched refs:r (Results 1 – 7 of 7) sorted by relevance

/libcpu/c-sky/common/
A Dcsi_simd.h493 int32_t r, s; in __SHADD16() local
514 int32_t r, s; in __UHADD16() local
591 int32_t r, s; in __QSUB16() local
614 int32_t r, s; in __UQSUB16() local
637 int32_t r, s; in __SSUB16() local
660 int32_t r, s; in __USUB16() local
681 int32_t r, s; in __SHSUB16() local
702 int32_t r, s; in __UHSUB16() local
784 int32_t r, s; in __QASX() local
812 int32_t r, s; in __UQASX() local
[all …]
A Dcsi_instr.h28 #define __CSI_GCC_OUT_REG(r) "=r" (r) argument
29 #define __CSI_GCC_USE_REG(r) "r" (r) argument
/libcpu/aarch64/
A DSConscript31 flags = re.sub(r'\s+', ' ', re.sub(r'\s*-std=gnu99\s*', ' ', g["LOCAL_CFLAGS"])).strip()
32 flags = re.sub(r'(?<!\s)(-Wunused)', r' \1', flags)
/libcpu/arm/cortex-a/
A Dtlb.h20 #define STORE_CP32(r, name...) "mcr " RT_STRINGIFY(CP32(%r, name)) ";" argument
/libcpu/rx/
A Dcontext_iar.S70 SHLL #16, R15 ; Shifted left as it is restored to the low orde r w
120 SHLL #16, R15 ; Shifted left as it is restored to the low orde r w
/libcpu/mips/gs264/
A Dmips_mmu.h61 uint64_t r : 2; member
A Dmips_mmu.c113 entry_hi.r = (vpn >> 62) & 0x03; in mmu_tlb_find()
175 tlb_item.entry_hi.r = (vpn >> 62) & 0x03; in mmu_set_map()

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