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Searched refs:tbl (Results 1 – 3 of 3) sorted by relevance

/libcpu/aarch64/common/
A Dmmu.c443 void rt_hw_mmu_ktbl_set(unsigned long tbl) in rt_hw_mmu_ktbl_set() argument
446 tbl += PV_OFFSET; in rt_hw_mmu_ktbl_set()
447 __asm__ volatile("msr TTBR1_EL1, %0\n dsb sy\nisb" ::"r"(tbl) : "memory"); in rt_hw_mmu_ktbl_set()
449 __asm__ volatile("msr TTBR0_EL1, %0\n dsb sy\nisb" ::"r"(tbl) : "memory"); in rt_hw_mmu_ktbl_set()
692 uintptr_t tbl; in rt_hw_mmu_tbl_get() local
693 __asm__ volatile("MRS %0, TTBR0_EL1" : "=r"(tbl)); in rt_hw_mmu_tbl_get()
694 return rt_kmem_p2v((void *)(tbl & ((1ul << 48) - 2))); in rt_hw_mmu_tbl_get()
701 static void *tbl = RT_NULL; in rt_ioremap_early() local
708 if (!tbl) in rt_ioremap_early()
710 tbl = rt_hw_mmu_tbl_get(); in rt_ioremap_early()
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/libcpu/aarch64/common/include/
A Dmmu.h106 void rt_hw_mmu_ktbl_set(unsigned long tbl);
/libcpu/arm/cortex-a/
A Dmmu.h121 void rt_hw_mmu_switch(void *tbl);

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