1 /**
2 *****************************************************************************
3 * @file cmem7_uart.c
4 *
5 * @brief CMEM7 uart file
6 *
7 *
8 * @version V1.0
9 * @date 3. September 2013
10 *
11 * @note
12 *
13 *****************************************************************************
14 * @attention
15 *
16 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
17 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
18 * TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
19 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
20 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
21 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
22 *
23 * <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
24 *****************************************************************************
25 */
26
27 #include "cmem7_uart.h"
28
29 #define UART_Mode_8b 1
30 #define UART_Mode_8b_Parity 7
31
32 #define UART_BaudMode_0 0
33 #define UART_BaudMode_1 1
34 #define UART_BaudMode_Division 19200
35
36 #define UART_WR_MAX_FIFO_SIZE 16
37
UART_GetClock(UART0_Type * UARTx)38 static uint32_t UART_GetClock(UART0_Type* UARTx) {
39 uint32_t dividor;
40 assert_param(IS_UART_ALL_PERIPH(UARTx));
41
42 if ((uint32_t)UARTx == (uint32_t)UART0) {
43 dividor = GLOBAL_CTRL->CLK_SEL_0_b.UART0_CLK;
44 } else if ((uint32_t)UARTx == (uint32_t)UART1) {
45 dividor = GLOBAL_CTRL->CLK_SEL_0_b.UART1_CLK;
46 } else if ((uint32_t)UARTx == (uint32_t)UART2) {
47 dividor = GLOBAL_CTRL->CLK_SEL_1_b.UART2_CLK;
48 }
49
50 return SYSTEM_CLOCK_FREQ / (1 << (dividor + 1));
51 }
52
UART_CalcBaudrateReload(uint32_t FreqHz,uint32_t Baudrate)53 static uint16_t UART_CalcBaudrateReload(uint32_t FreqHz, uint32_t Baudrate) {
54 if (Baudrate <= UART_BaudMode_Division) {
55 /** reload in mode 0
56 * reload = FreqHz / 16 * Baudrate
57 * round up
58 * reload = FreqHz / 16 * Baudrate + 1/ 2
59 * reload = (2 * FreqHz + 16 * Baudrate) / 2 * 16 * Baudrate
60 */
61 return ((FreqHz << 1) + (Baudrate << 4)) / (Baudrate << 5);
62 }
63
64 /** reload in mode 1
65 * reload = Baudrate * 16 * 65536 / FreqHz
66 * round up
67 * reload = Baudrate * 16 * 65536 / FreqHz + 1/ 2
68 * reload = (2 * Baudrate * 16 * 65536 + FreqHz) / 2 * FreqHz
69 */
70 return ((((uint64_t)(Baudrate)) << 21) + FreqHz) / (FreqHz << 1);
71 }
72
UART_Init(UART0_Type * UARTx,UART_InitTypeDef * init)73 void UART_Init(UART0_Type* UARTx, UART_InitTypeDef *init) {
74 assert_param(IS_UART_ALL_PERIPH(UARTx));
75 assert_param(init);
76 assert_param(IS_UART_STOPBITS(init->UART_StopBits));
77 assert_param(IS_UART_PARITY(init->UART_Parity));
78
79 /* TODO : assume clock is 50MHz */
80 UARTx->BAUDRATE = UART_CalcBaudrateReload(
81 UART_GetClock(UARTx), init->UART_BaudRate);
82 UARTx->CTRL_b.MODE =
83 (init->UART_Parity == UART_Parity_None) ?
84 UART_Mode_8b : UART_Mode_8b_Parity;
85 UARTx->CTRL_b.STOP = init->UART_StopBits;
86 UARTx->CTRL_b.PARITY =
87 (init->UART_Parity == UART_Parity_None) ?
88 UART_Parity_Even : init->UART_Parity;
89 UARTx->CTRL_b.LOOPBACK = init->UART_LoopBack;
90 UARTx->CTRL_b.RX_EN = init->UART_RxEn;
91 UARTx->CTRL_b.CTS = init->UART_CtsEn;
92 UARTx->CTRL_b.BAUD_MODE =
93 (init->UART_BaudRate > UART_BaudMode_Division) ?
94 UART_BaudMode_1 : UART_BaudMode_0;
95 UARTx->CTRL_b.FIFO_EN = TRUE;
96 UARTx->CTRL_b.RX_THRESHOLD = UART_WR_MAX_FIFO_SIZE;
97 UARTx->CTRL_b.RX_HALF_FULL = (UART_WR_MAX_FIFO_SIZE >> 1);
98 UARTx->TIMEOUT = 0xFF;
99
100 UARTx->INT_MASK |= UART_Int_All;
101 UARTx->INT_SEEN &= UART_Int_All;
102 }
103
UART_EnableInt(UART0_Type * UARTx,uint32_t Int,BOOL enable)104 void UART_EnableInt(UART0_Type* UARTx, uint32_t Int, BOOL enable) {
105 assert_param(IS_UART_ALL_PERIPH(UARTx));
106 assert_param(IS_UART_INT(Int));
107
108 if (enable) {
109 UARTx->INT_MASK &= ~Int;
110 } else {
111 UARTx->INT_MASK |= Int;
112 }
113
114 UARTx->INT_MASK &= UART_Int_All;
115 }
116
UART_Enable(UART0_Type * UARTx,BOOL enable)117 void UART_Enable(UART0_Type* UARTx, BOOL enable) {
118 assert_param(IS_UART_ALL_PERIPH(UARTx));
119
120 UARTx->RUN_b.EN = enable;
121 }
122
UART_GetIntStatus(UART0_Type * UARTx,uint32_t Int)123 BOOL UART_GetIntStatus(UART0_Type* UARTx, uint32_t Int) {
124 assert_param(IS_UART_ALL_PERIPH(UARTx));
125 assert_param(IS_UART_INT(Int));
126
127 if (0 != (UARTx->INT_SEEN & Int)) {
128 return TRUE;
129 }
130
131 return FALSE;
132 }
133
UART_ClearInt(UART0_Type * UARTx,uint32_t Int)134 void UART_ClearInt(UART0_Type* UARTx, uint32_t Int) {
135 assert_param(IS_UART_ALL_PERIPH(UARTx));
136 assert_param(IS_UART_INT(Int));
137
138 UARTx->INT_SEEN = Int;
139 }
140
UART_Write(UART0_Type * UARTx,uint8_t Size,uint8_t * Data)141 uint8_t UART_Write(UART0_Type* UARTx, uint8_t Size, uint8_t* Data) {
142 uint8_t count;
143
144 /* Check the parameters */
145 assert_param(IS_UART_ALL_PERIPH(UARTx));
146 assert_param(Data);
147
148 if (!UARTx->RUN_b.EN) {
149 return 0;
150 }
151
152 count = 0;
153 while (!UARTx->STATUS_b.TF && count < Size) {
154 UARTx->TX_BUF = *(Data + count++);
155 }
156
157 return count;
158 }
159
160 /* return value is actual read data size */
UART_Read(UART0_Type * UARTx,uint8_t Size,uint8_t * Data)161 uint8_t UART_Read(UART0_Type* UARTx, uint8_t Size, uint8_t* Data) {
162 uint8_t count;
163
164 assert_param(IS_UART_ALL_PERIPH(UARTx));
165 assert_param(Data);
166
167 if (!UARTx->RUN_b.EN) {
168 return 0;
169 }
170
171 count = 0;
172 while (UARTx->STATUS_b.RNE && count < Size) {
173 *(Data + count++) = (UARTx->RX_BUF & 0x00FF);
174 }
175
176 return count;
177 }
178
179