1 /******************************************************************************* 2 * File Name: cycfg_qspi_memslot.c 3 * 4 * Description: 5 * Provides definitions of the SMIF-driver memory configuration. 6 * This file was automatically generated and should not be modified. 7 * QSPI Configurator 4.0.0.985 8 * 9 ******************************************************************************** 10 * Copyright 2023 Cypress Semiconductor Corporation (an Infineon company) or 11 * an affiliate of Cypress Semiconductor Corporation. 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 ********************************************************************************/ 26 27 #include "cycfg_qspi_memslot.h" 28 29 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd = 30 { 31 /* The 8-bit command. 1 x I/O read command. */ 32 .command = 0xECU, 33 /* The width of the command transfer. */ 34 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 35 /* The width of the address transfer. */ 36 .addrWidth = CY_SMIF_WIDTH_QUAD, 37 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 38 .mode = 0x01U, 39 /* The width of the mode command transfer. */ 40 .modeWidth = CY_SMIF_WIDTH_QUAD, 41 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 42 .dummyCycles = 4U, 43 /* The width of the data transfer. */ 44 .dataWidth = CY_SMIF_WIDTH_QUAD, 45 #if (CY_IP_MXSMIF_VERSION >= 2) 46 /* The Data rate of data */ 47 .dataRate = CY_SMIF_SDR, 48 /* This specifies the presence of the dummy field */ 49 .dummyCyclesPresence = CY_SMIF_PRESENT_1BYTE, 50 /* This specifies the presence of the mode field */ 51 .modePresence = CY_SMIF_PRESENT_1BYTE, 52 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 53 .modeH = 0x00, 54 /* The Data rate of mode */ 55 .modeRate = CY_SMIF_SDR, 56 /* The Data rate of address */ 57 .addrRate = CY_SMIF_SDR, 58 /* This specifies the width of the command field */ 59 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 60 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 61 .commandH = 0x00, 62 /* The Data rate of command */ 63 .cmdRate = CY_SMIF_SDR 64 #endif /* CY_IP_MXSMIF_VERSION */ 65 }; 66 67 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd = 68 { 69 /* The 8-bit command. 1 x I/O read command. */ 70 .command = 0x06U, 71 /* The width of the command transfer. */ 72 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 73 /* The width of the address transfer. */ 74 .addrWidth = CY_SMIF_WIDTH_SINGLE, 75 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 76 .mode = 0xFFFFFFFFU, 77 /* The width of the mode command transfer. */ 78 .modeWidth = CY_SMIF_WIDTH_SINGLE, 79 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 80 .dummyCycles = 0U, 81 /* The width of the data transfer. */ 82 .dataWidth = CY_SMIF_WIDTH_SINGLE, 83 #if (CY_IP_MXSMIF_VERSION >= 2) 84 /* The Data rate of data */ 85 .dataRate = CY_SMIF_SDR, 86 /* This specifies the presence of the dummy field */ 87 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 88 /* This specifies the presence of the mode field */ 89 .modePresence = CY_SMIF_NOT_PRESENT, 90 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 91 .modeH = 0x00, 92 /* The Data rate of mode */ 93 .modeRate = CY_SMIF_SDR, 94 /* The Data rate of address */ 95 .addrRate = CY_SMIF_SDR, 96 /* This specifies the width of the command field */ 97 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 98 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 99 .commandH = 0x00, 100 /* The Data rate of command */ 101 .cmdRate = CY_SMIF_SDR 102 #endif /* CY_IP_MXSMIF_VERSION */ 103 }; 104 105 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd = 106 { 107 /* The 8-bit command. 1 x I/O read command. */ 108 .command = 0x04U, 109 /* The width of the command transfer. */ 110 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 111 /* The width of the address transfer. */ 112 .addrWidth = CY_SMIF_WIDTH_SINGLE, 113 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 114 .mode = 0xFFFFFFFFU, 115 /* The width of the mode command transfer. */ 116 .modeWidth = CY_SMIF_WIDTH_SINGLE, 117 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 118 .dummyCycles = 0U, 119 /* The width of the data transfer. */ 120 .dataWidth = CY_SMIF_WIDTH_SINGLE, 121 #if (CY_IP_MXSMIF_VERSION >= 2) 122 /* The Data rate of data */ 123 .dataRate = CY_SMIF_SDR, 124 /* This specifies the presence of the dummy field */ 125 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 126 /* This specifies the presence of the mode field */ 127 .modePresence = CY_SMIF_NOT_PRESENT, 128 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 129 .modeH = 0x00, 130 /* The Data rate of mode */ 131 .modeRate = CY_SMIF_SDR, 132 /* The Data rate of address */ 133 .addrRate = CY_SMIF_SDR, 134 /* This specifies the width of the command field */ 135 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 136 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 137 .commandH = 0x00, 138 /* The Data rate of command */ 139 .cmdRate = CY_SMIF_SDR 140 #endif /* CY_IP_MXSMIF_VERSION */ 141 }; 142 143 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd = 144 { 145 /* The 8-bit command. 1 x I/O read command. */ 146 .command = 0xDCU, 147 /* The width of the command transfer. */ 148 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 149 /* The width of the address transfer. */ 150 .addrWidth = CY_SMIF_WIDTH_SINGLE, 151 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 152 .mode = 0xFFFFFFFFU, 153 /* The width of the mode command transfer. */ 154 .modeWidth = CY_SMIF_WIDTH_SINGLE, 155 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 156 .dummyCycles = 0U, 157 /* The width of the data transfer. */ 158 .dataWidth = CY_SMIF_WIDTH_SINGLE, 159 #if (CY_IP_MXSMIF_VERSION >= 2) 160 /* The Data rate of data */ 161 .dataRate = CY_SMIF_SDR, 162 /* This specifies the presence of the dummy field */ 163 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 164 /* This specifies the presence of the mode field */ 165 .modePresence = CY_SMIF_NOT_PRESENT, 166 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 167 .modeH = 0x00, 168 /* The Data rate of mode */ 169 .modeRate = CY_SMIF_SDR, 170 /* The Data rate of address */ 171 .addrRate = CY_SMIF_SDR, 172 /* This specifies the width of the command field */ 173 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 174 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 175 .commandH = 0x00, 176 /* The Data rate of command */ 177 .cmdRate = CY_SMIF_SDR 178 #endif /* CY_IP_MXSMIF_VERSION */ 179 }; 180 181 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd = 182 { 183 /* The 8-bit command. 1 x I/O read command. */ 184 .command = 0x60U, 185 /* The width of the command transfer. */ 186 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 187 /* The width of the address transfer. */ 188 .addrWidth = CY_SMIF_WIDTH_SINGLE, 189 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 190 .mode = 0xFFFFFFFFU, 191 /* The width of the mode command transfer. */ 192 .modeWidth = CY_SMIF_WIDTH_SINGLE, 193 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 194 .dummyCycles = 0U, 195 /* The width of the data transfer. */ 196 .dataWidth = CY_SMIF_WIDTH_SINGLE, 197 #if (CY_IP_MXSMIF_VERSION >= 2) 198 /* The Data rate of data */ 199 .dataRate = CY_SMIF_SDR, 200 /* This specifies the presence of the dummy field */ 201 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 202 /* This specifies the presence of the mode field */ 203 .modePresence = CY_SMIF_NOT_PRESENT, 204 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 205 .modeH = 0x00, 206 /* The Data rate of mode */ 207 .modeRate = CY_SMIF_SDR, 208 /* The Data rate of address */ 209 .addrRate = CY_SMIF_SDR, 210 /* This specifies the width of the command field */ 211 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 212 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 213 .commandH = 0x00, 214 /* The Data rate of command */ 215 .cmdRate = CY_SMIF_SDR 216 #endif /* CY_IP_MXSMIF_VERSION */ 217 }; 218 219 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd = 220 { 221 /* The 8-bit command. 1 x I/O read command. */ 222 .command = 0x34U, 223 /* The width of the command transfer. */ 224 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 225 /* The width of the address transfer. */ 226 .addrWidth = CY_SMIF_WIDTH_SINGLE, 227 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 228 .mode = 0xFFFFFFFFU, 229 /* The width of the mode command transfer. */ 230 .modeWidth = CY_SMIF_WIDTH_QUAD, 231 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 232 .dummyCycles = 0U, 233 /* The width of the data transfer. */ 234 .dataWidth = CY_SMIF_WIDTH_QUAD, 235 #if (CY_IP_MXSMIF_VERSION >= 2) 236 /* The Data rate of data */ 237 .dataRate = CY_SMIF_SDR, 238 /* This specifies the presence of the dummy field */ 239 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 240 /* This specifies the presence of the mode field */ 241 .modePresence = CY_SMIF_NOT_PRESENT, 242 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 243 .modeH = 0x00, 244 /* The Data rate of mode */ 245 .modeRate = CY_SMIF_SDR, 246 /* The Data rate of address */ 247 .addrRate = CY_SMIF_SDR, 248 /* This specifies the width of the command field */ 249 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 250 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 251 .commandH = 0x00, 252 /* The Data rate of command */ 253 .cmdRate = CY_SMIF_SDR 254 #endif /* CY_IP_MXSMIF_VERSION */ 255 }; 256 257 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd = 258 { 259 /* The 8-bit command. 1 x I/O read command. */ 260 .command = 0x35U, 261 /* The width of the command transfer. */ 262 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 263 /* The width of the address transfer. */ 264 .addrWidth = CY_SMIF_WIDTH_SINGLE, 265 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 266 .mode = 0xFFFFFFFFU, 267 /* The width of the mode command transfer. */ 268 .modeWidth = CY_SMIF_WIDTH_SINGLE, 269 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 270 .dummyCycles = 0U, 271 /* The width of the data transfer. */ 272 .dataWidth = CY_SMIF_WIDTH_SINGLE, 273 #if (CY_IP_MXSMIF_VERSION >= 2) 274 /* The Data rate of data */ 275 .dataRate = CY_SMIF_SDR, 276 /* This specifies the presence of the dummy field */ 277 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 278 /* This specifies the presence of the mode field */ 279 .modePresence = CY_SMIF_NOT_PRESENT, 280 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 281 .modeH = 0x00, 282 /* The Data rate of mode */ 283 .modeRate = CY_SMIF_SDR, 284 /* The Data rate of address */ 285 .addrRate = CY_SMIF_SDR, 286 /* This specifies the width of the command field */ 287 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 288 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 289 .commandH = 0x00, 290 /* The Data rate of command */ 291 .cmdRate = CY_SMIF_SDR 292 #endif /* CY_IP_MXSMIF_VERSION */ 293 }; 294 295 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd = 296 { 297 /* The 8-bit command. 1 x I/O read command. */ 298 .command = 0x05U, 299 /* The width of the command transfer. */ 300 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 301 /* The width of the address transfer. */ 302 .addrWidth = CY_SMIF_WIDTH_SINGLE, 303 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 304 .mode = 0xFFFFFFFFU, 305 /* The width of the mode command transfer. */ 306 .modeWidth = CY_SMIF_WIDTH_SINGLE, 307 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 308 .dummyCycles = 0U, 309 /* The width of the data transfer. */ 310 .dataWidth = CY_SMIF_WIDTH_SINGLE, 311 #if (CY_IP_MXSMIF_VERSION >= 2) 312 /* The Data rate of data */ 313 .dataRate = CY_SMIF_SDR, 314 /* This specifies the presence of the dummy field */ 315 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 316 /* This specifies the presence of the mode field */ 317 .modePresence = CY_SMIF_NOT_PRESENT, 318 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 319 .modeH = 0x00, 320 /* The Data rate of mode */ 321 .modeRate = CY_SMIF_SDR, 322 /* The Data rate of address */ 323 .addrRate = CY_SMIF_SDR, 324 /* This specifies the width of the command field */ 325 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 326 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 327 .commandH = 0x00, 328 /* The Data rate of command */ 329 .cmdRate = CY_SMIF_SDR 330 #endif /* CY_IP_MXSMIF_VERSION */ 331 }; 332 333 const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd = 334 { 335 /* The 8-bit command. 1 x I/O read command. */ 336 .command = 0x01U, 337 /* The width of the command transfer. */ 338 .cmdWidth = CY_SMIF_WIDTH_SINGLE, 339 /* The width of the address transfer. */ 340 .addrWidth = CY_SMIF_WIDTH_SINGLE, 341 /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */ 342 .mode = 0xFFFFFFFFU, 343 /* The width of the mode command transfer. */ 344 .modeWidth = CY_SMIF_WIDTH_SINGLE, 345 /* The number of dummy cycles. A zero value suggests no dummy cycles. */ 346 .dummyCycles = 0U, 347 /* The width of the data transfer. */ 348 .dataWidth = CY_SMIF_WIDTH_SINGLE, 349 #if (CY_IP_MXSMIF_VERSION >= 2) 350 /* The Data rate of data */ 351 .dataRate = CY_SMIF_SDR, 352 /* This specifies the presence of the dummy field */ 353 .dummyCyclesPresence = CY_SMIF_NOT_PRESENT, 354 /* This specifies the presence of the mode field */ 355 .modePresence = CY_SMIF_NOT_PRESENT, 356 /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */ 357 .modeH = 0x00, 358 /* The Data rate of mode */ 359 .modeRate = CY_SMIF_SDR, 360 /* The Data rate of address */ 361 .addrRate = CY_SMIF_SDR, 362 /* This specifies the width of the command field */ 363 .cmdPresence = CY_SMIF_PRESENT_1BYTE, 364 /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */ 365 .commandH = 0x00, 366 /* The Data rate of command */ 367 .cmdRate = CY_SMIF_SDR 368 #endif /* CY_IP_MXSMIF_VERSION */ 369 }; 370 371 const cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0 = 372 { 373 /* Specifies the number of address bytes used by the memory slave device. */ 374 .numOfAddrBytes = 0x04U, 375 /* The size of the memory. */ 376 .memSize = 0x04000000U, 377 /* Specifies the Read command. */ 378 .readCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_readCmd, 379 /* Specifies the Write Enable command. */ 380 .writeEnCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_writeEnCmd, 381 /* Specifies the Write Disable command. */ 382 .writeDisCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_writeDisCmd, 383 /* Specifies the Erase command. */ 384 .eraseCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_eraseCmd, 385 /* Specifies the sector size of each erase. */ 386 .eraseSize = 0x00040000U, 387 /* Specifies the Chip Erase command. */ 388 .chipEraseCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_chipEraseCmd, 389 /* Specifies the Program command. */ 390 .programCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_programCmd, 391 /* Specifies the page size for programming. */ 392 .programSize = 0x00000200U, 393 /* Specifies the command to read the QE-containing status register. */ 394 .readStsRegQeCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_readStsRegQeCmd, 395 /* Specifies the command to read the WIP-containing status register. */ 396 .readStsRegWipCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_readStsRegWipCmd, 397 /* Specifies the command to write into the QE-containing status register. */ 398 .writeStsRegQeCmd = (cy_stc_smif_mem_cmd_t*)&S25FL512S_SlaveSlot_0_writeStsRegQeCmd, 399 /* The mask for the status register. */ 400 .stsRegBusyMask = 0x01U, 401 /* The mask for the status register. */ 402 .stsRegQuadEnableMask = 0x02U, 403 /* The max time for the erase type-1 cycle-time in ms. */ 404 .eraseTime = 2600U, 405 /* The max time for the chip-erase cycle-time in ms. */ 406 .chipEraseTime = 460000U, 407 /* The max time for the page-program cycle-time in us. */ 408 .programTime = 1300U, 409 #if (CY_SMIF_DRV_VERSION_MAJOR > 1) || (CY_SMIF_DRV_VERSION_MINOR >= 50) 410 /* Points to NULL or to structure with info about sectors for hybrid memory. */ 411 .hybridRegionCount = 0U, 412 .hybridRegionInfo = NULL 413 #endif 414 }; 415 416 const cy_stc_smif_mem_config_t S25FL512S_SlaveSlot_0 = 417 { 418 /* Determines the slot number where the memory device is placed. */ 419 .slaveSelect = CY_SMIF_SLAVE_SELECT_0, 420 /* Flags. */ 421 #if (CY_IP_MXSMIF_VERSION >= 2) 422 .flags = CY_SMIF_FLAG_SMIF_REV_3 | CY_SMIF_FLAG_MEMORY_MAPPED | CY_SMIF_FLAG_WR_EN, 423 #else 424 .flags = CY_SMIF_FLAG_MEMORY_MAPPED | CY_SMIF_FLAG_WR_EN, 425 #endif /* CY_IP_MXSMIF_VERSION */ 426 /* The data-line selection options for a slave device. */ 427 .dataSelect = CY_SMIF_DATA_SEL0, 428 /* The base address the memory slave is mapped to in the PSoC memory map. 429 Valid when the memory-mapped mode is enabled. */ 430 .baseAddress = 0x18000000U, 431 /* The size allocated in the PSoC memory map, for the memory slave device. 432 The size is allocated from the base address. Valid when the memory mapped mode is enabled. */ 433 .memMappedSize = 0x4000000U, 434 /* If this memory device is one of the devices in the dual quad SPI configuration. 435 Valid when the memory mapped mode is enabled. */ 436 .dualQuadSlots = 0, 437 /* The configuration of the device. */ 438 .deviceCfg = (cy_stc_smif_mem_device_cfg_t*)&deviceCfg_S25FL512S_SlaveSlot_0, 439 #if (CY_IP_MXSMIF_VERSION >= 2) 440 /** Continous transfer merge timeout. 441 * After this period the memory device is deselected. A later transfer, even from a 442 * continuous address, starts with the overhead phases (command, address, mode, dummy cycles). 443 * This configuration parameter is available for CAT1B devices. */ 444 .mergeTimeout = CY_SMIF_MERGE_TIMEOUT_1_CYCLE 445 #endif /* CY_IP_MXSMIF_VERSION */ 446 }; 447 448 const cy_stc_smif_mem_config_t* const smifMemConfigs[CY_SMIF_DEVICE_NUM] = { 449 &S25FL512S_SlaveSlot_0 450 }; 451 452 const cy_stc_smif_block_config_t smifBlockConfig = 453 { 454 /* The number of SMIF memories defined. */ 455 .memCount = CY_SMIF_DEVICE_NUM, 456 /* The pointer to the array of memory config structures of size memCount. */ 457 .memConfig = (cy_stc_smif_mem_config_t**)smifMemConfigs, 458 /* The version of the SMIF driver. */ 459 .majorVersion = CY_SMIF_DRV_VERSION_MAJOR, 460 /* The version of the SMIF driver. */ 461 .minorVersion = CY_SMIF_DRV_VERSION_MINOR 462 }; 463