1 /******************************************************************************* 2 * File Name: cycfg_peripherals.h 3 * 4 * Description: 5 * Peripheral Hardware Block configuration 6 * This file was automatically generated and should not be modified. 7 * Configurator Backend 3.0.0 8 * device-db 4.3.0.3855 9 * mtb-pdl-cat1 3.4.0.24948 10 * 11 ******************************************************************************** 12 * Copyright 2023 Cypress Semiconductor Corporation (an Infineon company) or 13 * an affiliate of Cypress Semiconductor Corporation. 14 * SPDX-License-Identifier: Apache-2.0 15 * 16 * Licensed under the Apache License, Version 2.0 (the "License"); 17 * you may not use this file except in compliance with the License. 18 * You may obtain a copy of the License at 19 * 20 * http://www.apache.org/licenses/LICENSE-2.0 21 * 22 * Unless required by applicable law or agreed to in writing, software 23 * distributed under the License is distributed on an "AS IS" BASIS, 24 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25 * See the License for the specific language governing permissions and 26 * limitations under the License. 27 ********************************************************************************/ 28 29 #if !defined(CYCFG_PERIPHERALS_H) 30 #define CYCFG_PERIPHERALS_H 31 32 #include "cycfg_notices.h" 33 #include "cy_sysclk.h" 34 #include "cy_csd.h" 35 36 #if defined(__cplusplus) 37 extern "C" { 38 #endif 39 40 #define CYBSP_CSD_ENABLED 1U 41 #define CY_CAPSENSE_CORE 4u 42 #define CY_CAPSENSE_CPU_CLK 100000000u 43 #define CY_CAPSENSE_PERI_CLK 100000000u 44 #define CY_CAPSENSE_VDDA_MV 3300u 45 #define CY_CAPSENSE_PERI_DIV_TYPE CY_SYSCLK_DIV_8_BIT 46 #define CY_CAPSENSE_PERI_DIV_INDEX 0u 47 #define Cmod_PORT GPIO_PRT7 48 #define Button0_Sns0_PORT GPIO_PRT7 49 #define Button1_Sns0_PORT GPIO_PRT9 50 #define LinearSlider0_Sns0_PORT GPIO_PRT9 51 #define LinearSlider0_Sns1_PORT GPIO_PRT9 52 #define LinearSlider0_Sns2_PORT GPIO_PRT9 53 #define LinearSlider0_Sns3_PORT GPIO_PRT9 54 #define LinearSlider0_Sns4_PORT GPIO_PRT9 55 #define Cmod_PIN 7u 56 #define Button0_Sns0_PIN 3u 57 #define Button1_Sns0_PIN 0u 58 #define LinearSlider0_Sns0_PIN 1u 59 #define LinearSlider0_Sns1_PIN 2u 60 #define LinearSlider0_Sns2_PIN 3u 61 #define LinearSlider0_Sns3_PIN 0u 62 #define LinearSlider0_Sns4_PIN 1u 63 #define Cmod_PORT_NUM 7u 64 #define CYBSP_CSD_HW CSD0 65 #define CYBSP_CSD_IRQ csd_interrupt_IRQn 66 67 extern cy_stc_csd_context_t cy_csd_0_context; 68 69 void init_cycfg_peripherals(void); 70 71 #if defined(__cplusplus) 72 } 73 #endif 74 75 76 #endif /* CYCFG_PERIPHERALS_H */ 77