1 /** 2 ****************************************************************************** 3 * @file lib_adc.h 4 * @author Application Team 5 * @version V4.6.0 6 * @date 2019-06-18 7 * @brief ADC library. 8 ****************************************************************************** 9 * @attention 10 * 11 ****************************************************************************** 12 */ 13 #ifndef __LIB_ADC_H 14 #define __LIB_ADC_H 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 #include "target.h" 21 22 typedef struct 23 { 24 uint32_t TrigMode; 25 uint32_t ConvMode; 26 uint32_t ClockSource; 27 uint32_t ClockDivider; 28 uint32_t Channel; 29 } ADCInitType; 30 31 //TrigMode 32 #define ADC_TRIGMODE_AUTO 0 33 #define ADC_TRIGMODE_MANUAL ANA_ADCCTRL_MTRIG 34 #define IS_ADC_TRIGMODE(__TRIGMODE__) (((__TRIGMODE__) == ADC_TRIGMODE_AUTO) ||\ 35 ((__TRIGMODE__) == ADC_TRIGMODE_MANUAL)) 36 37 //ConvMode 38 #define ADC_CONVMODE_SINGLECHANNEL 0 39 #define ADC_CONVMODE_MULTICHANNEL 1 40 #define IS_ADC_CONVMODE(__CONVMODE__) (((__CONVMODE__) == ADC_CONVMODE_SINGLECHANNEL) ||\ 41 ((__CONVMODE__) == ADC_CONVMODE_MULTICHANNEL)) 42 43 //ClockSource 44 #define ADC_CLKSRC_RCH 0 45 #define ADC_CLKSRC_PLLL ANA_ADCCTRL_CLKSEL 46 #define IS_ADC_CLKSRC(__CLKSRC__) (((__CLKSRC__) == ADC_CLKSRC_RCH) ||\ 47 ((__CLKSRC__) == ADC_CLKSRC_PLLL)) 48 49 //TrigSource 50 #define ADC_TRIGSOURCE_OFF ANA_ADCCTRL_AEN_OFF 51 #define ADC_TRIGSOURCE_TIM0 ANA_ADCCTRL_AEN_TMR0 52 #define ADC_TRIGSOURCE_TIM1 ANA_ADCCTRL_AEN_TMR1 53 #define ADC_TRIGSOURCE_TIM2 ANA_ADCCTRL_AEN_TMR2 54 #define ADC_TRIGSOURCE_TIM3 ANA_ADCCTRL_AEN_TMR3 55 #define IS_ADC_TRIGSOURCE(__TRIGSOURCE__) (((__TRIGSOURCE__) == ADC_TRIGSOURCE_OFF) ||\ 56 ((__TRIGSOURCE__) == ADC_TRIGSOURCE_TIM0) ||\ 57 ((__TRIGSOURCE__) == ADC_TRIGSOURCE_TIM1) ||\ 58 ((__TRIGSOURCE__) == ADC_TRIGSOURCE_TIM2) ||\ 59 ((__TRIGSOURCE__) == ADC_TRIGSOURCE_TIM3)) 60 61 //ClockDivider 62 #define ADC_CLKDIV_1 ANA_ADCCTRL_CLKDIV_1 63 #define ADC_CLKDIV_2 ANA_ADCCTRL_CLKDIV_2 64 #define ADC_CLKDIV_3 ANA_ADCCTRL_CLKDIV_3 65 #define ADC_CLKDIV_4 ANA_ADCCTRL_CLKDIV_4 66 #define ADC_CLKDIV_5 ANA_ADCCTRL_CLKDIV_5 67 #define ADC_CLKDIV_6 ANA_ADCCTRL_CLKDIV_6 68 #define ADC_CLKDIV_7 ANA_ADCCTRL_CLKDIV_7 69 #define ADC_CLKDIV_8 ANA_ADCCTRL_CLKDIV_8 70 #define ADC_CLKDIV_9 ANA_ADCCTRL_CLKDIV_9 71 #define ADC_CLKDIV_10 ANA_ADCCTRL_CLKDIV_10 72 #define ADC_CLKDIV_11 ANA_ADCCTRL_CLKDIV_11 73 #define ADC_CLKDIV_12 ANA_ADCCTRL_CLKDIV_12 74 #define ADC_CLKDIV_13 ANA_ADCCTRL_CLKDIV_13 75 #define ADC_CLKDIV_14 ANA_ADCCTRL_CLKDIV_14 76 #define ADC_CLKDIV_15 ANA_ADCCTRL_CLKDIV_15 77 #define ADC_CLKDIV_16 ANA_ADCCTRL_CLKDIV_16 78 #define IS_ADC_CLKDIV(__CLKDIV__) (((__CLKDIV__) == ADC_CLKDIV_1) ||\ 79 ((__CLKDIV__) == ADC_CLKDIV_2) ||\ 80 ((__CLKDIV__) == ADC_CLKDIV_3) ||\ 81 ((__CLKDIV__) == ADC_CLKDIV_4) ||\ 82 ((__CLKDIV__) == ADC_CLKDIV_5) ||\ 83 ((__CLKDIV__) == ADC_CLKDIV_6) ||\ 84 ((__CLKDIV__) == ADC_CLKDIV_7) ||\ 85 ((__CLKDIV__) == ADC_CLKDIV_8) ||\ 86 ((__CLKDIV__) == ADC_CLKDIV_9) ||\ 87 ((__CLKDIV__) == ADC_CLKDIV_10) ||\ 88 ((__CLKDIV__) == ADC_CLKDIV_11) ||\ 89 ((__CLKDIV__) == ADC_CLKDIV_12) ||\ 90 ((__CLKDIV__) == ADC_CLKDIV_13) ||\ 91 ((__CLKDIV__) == ADC_CLKDIV_14) ||\ 92 ((__CLKDIV__) == ADC_CLKDIV_15) ||\ 93 ((__CLKDIV__) == ADC_CLKDIV_16)) 94 95 //Channel 96 #define ADC_CHANNEL0 0 97 #define ADC_CHANNEL1 1 98 #define ADC_CHANNEL2 2 99 #define ADC_CHANNEL3 3 100 #define ADC_CHANNEL4 4 101 #define ADC_CHANNEL5 5 102 #define ADC_CHANNEL6 6 103 #define ADC_CHANNEL7 7 104 #define ADC_CHANNEL8 8 105 #define ADC_CHANNEL9 9 106 #define ADC_CHANNEL10 10 107 #define ADC_CHANNEL11 11 108 109 #define IS_ADC_CHANNEL(__CHANNEL__) (((__CHANNEL__) == ADC_CHANNEL0) ||\ 110 ((__CHANNEL__) == ADC_CHANNEL1) ||\ 111 ((__CHANNEL__) == ADC_CHANNEL2) ||\ 112 ((__CHANNEL__) == ADC_CHANNEL3) ||\ 113 ((__CHANNEL__) == ADC_CHANNEL4) ||\ 114 ((__CHANNEL__) == ADC_CHANNEL5) ||\ 115 ((__CHANNEL__) == ADC_CHANNEL6) ||\ 116 ((__CHANNEL__) == ADC_CHANNEL7) ||\ 117 ((__CHANNEL__) == ADC_CHANNEL8) ||\ 118 ((__CHANNEL__) == ADC_CHANNEL9) ||\ 119 ((__CHANNEL__) == ADC_CHANNEL10) ||\ 120 ((__CHANNEL__) == ADC_CHANNEL11)) 121 122 //INTMask 123 #define ADC_INT_AUTODONE ANA_INTEN_INTEN1 124 #define ADC_INT_MANUALDONE ANA_INTEN_INTEN0 125 #define ADC_INT_Msk (ADC_INT_AUTODONE | ADC_INT_MANUALDONE) 126 #define IS_ADC_INT(__INT__) ((((__INT__) & ADC_INT_Msk) != 0U) &&\ 127 (((__INT__) & ~ADC_INT_Msk) == 0U)) 128 129 //ScaleDown 130 #define ADC_SCA_NONE 0 131 #define ADC_SCA_DIV2 ANA_ADCCTRL_CICSCA 132 #define IS_ADC_SCA(__SCA__) (((__SCA__) == ADC_SCA_NONE) || ((__SCA__) == ADC_SCA_DIV2)) 133 134 //Skip 135 #define ADC_SKIP_4 ANA_ADCCTRL_CICSKIP_4 136 #define ADC_SKIP_5 ANA_ADCCTRL_CICSKIP_5 137 #define ADC_SKIP_6 ANA_ADCCTRL_CICSKIP_6 138 #define ADC_SKIP_7 ANA_ADCCTRL_CICSKIP_7 139 #define ADC_SKIP_0 ANA_ADCCTRL_CICSKIP_0 140 #define ADC_SKIP_1 ANA_ADCCTRL_CICSKIP_1 141 #define ADC_SKIP_2 ANA_ADCCTRL_CICSKIP_2 142 #define ADC_SKIP_3 ANA_ADCCTRL_CICSKIP_3 143 #define IS_ADC_SKIP(__SKIP__) (((__SKIP__) == ADC_SKIP_4) ||\ 144 ((__SKIP__) == ADC_SKIP_5) ||\ 145 ((__SKIP__) == ADC_SKIP_6) ||\ 146 ((__SKIP__) == ADC_SKIP_7) ||\ 147 ((__SKIP__) == ADC_SKIP_0) ||\ 148 ((__SKIP__) == ADC_SKIP_1) ||\ 149 ((__SKIP__) == ADC_SKIP_2) ||\ 150 ((__SKIP__) == ADC_SKIP_3)) 151 152 //DSRSelection 153 #define ADC_SDRSEL_DIV512 ANA_ADCCTRL_DSRSEL_512 154 #define ADC_SDRSEL_DIV256 ANA_ADCCTRL_DSRSEL_256 155 #define ADC_SDRSEL_DIV128 ANA_ADCCTRL_DSRSEL_128 156 #define ADC_SDRSEL_DIV64 ANA_ADCCTRL_DSRSEL_64 157 #define IS_ADC_SDR(__SDR__) (((__SDR__) == ADC_SDRSEL_DIV512) ||\ 158 ((__SDR__) == ADC_SDRSEL_DIV256) ||\ 159 ((__SDR__) == ADC_SDRSEL_DIV128) ||\ 160 ((__SDR__) == ADC_SDRSEL_DIV64)) 161 162 typedef struct 163 { 164 float VDDVoltage; 165 float BATRTCVoltage; 166 float Temperature; 167 } ADC_CalResType; 168 //Division 169 #define ADC_BAT_CAPDIV (ANA_REG1_GDE4) 170 #define ADC_BAT_RESDIV (ANA_REG1_RESDIV) 171 172 #define IS_ADC_BATDIV(__BATDIV__) (((__BATDIV__) == ADC_BAT_CAPDIV) ||\ 173 ((__BATDIV__) == ADC_BAT_RESDIV)) 174 175 /* ADC_GetVoltage */ 176 //Mode 177 #define ADC_3V_EXTERNAL_NODIV (0x000UL) // Power supply: 3.3V; Channel: External; Divider modeL: None 178 #define ADC_3V_EXTERNAL_RESDIV (0x001UL) // Power supply: 3.3V; Channel: External; Divider modeL: Resistive 179 #define ADC_3V_EXTERNAL_CAPDIV (0x002UL) // Power supply: 3.3V; Channel: External; Divider modeL: Capacitive 180 #define ADC_3V_VDD_RESDIV (0x003UL) // Power supply: 3.3V; Channel: VDD; Divider modeL: Resistive 181 #define ADC_3V_VDD_CAPDIV (0x004UL) // Power supply: 3.3V; Channel: VDD; Divider modeL: Capacitive 182 #define ADC_3V_BATRTC_RESDIV (0x005UL) // Power supply: 3.3V; Channel: BATRTC; Divider modeL: Resistive 183 #define ADC_3V_BATRTC_CAPDIV (0x006UL) // Power supply: 3.3V; Channel: BATRTC; Divider modeL: Capacitive 184 #define ADC_5V_EXTERNAL_NODIV (0x100UL) // Power supply: 5V; Channel: External; Divider modeL: None 185 #define ADC_5V_EXTERNAL_RESDIV (0x101UL) // Power supply: 5V; Channel: External; Divider modeL: Resistive 186 #define ADC_5V_EXTERNAL_CAPDIV (0x102UL) // Power supply: 5V; Channel: External; Divider modeL: Capacitive 187 #define ADC_5V_VDD_RESDIV (0x103UL) // Power supply: 5V; Channel: VDD; Divider modeL: Resistive 188 #define ADC_5V_VDD_CAPDIV (0x104UL) // Power supply: 5V; Channel: VDD; Divider modeL: Capacitive 189 #define ADC_5V_BATRTC_RESDIV (0x105UL) // Power supply: 5V; Channel: BATRTC; Divider modeL: Resistive 190 #define ADC_5V_BATRTC_CAPDIV (0x106UL) // Power supply: 5V; Channel: BATRTC; Divider modeL: Capacitive 191 #define IS_ADCVOL_MODE(__MODE__) (((__MODE__) == ADC_3V_EXTERNAL_NODIV) ||\ 192 ((__MODE__) == ADC_3V_EXTERNAL_RESDIV) ||\ 193 ((__MODE__) == ADC_3V_EXTERNAL_CAPDIV) ||\ 194 ((__MODE__) == ADC_3V_VDD_RESDIV) ||\ 195 ((__MODE__) == ADC_3V_VDD_CAPDIV) ||\ 196 ((__MODE__) == ADC_3V_BATRTC_RESDIV) ||\ 197 ((__MODE__) == ADC_3V_BATRTC_CAPDIV) ||\ 198 ((__MODE__) == ADC_5V_EXTERNAL_NODIV) ||\ 199 ((__MODE__) == ADC_5V_EXTERNAL_RESDIV) ||\ 200 ((__MODE__) == ADC_5V_EXTERNAL_CAPDIV) ||\ 201 ((__MODE__) == ADC_5V_VDD_RESDIV) ||\ 202 ((__MODE__) == ADC_5V_VDD_CAPDIV) ||\ 203 ((__MODE__) == ADC_5V_BATRTC_RESDIV) ||\ 204 ((__MODE__) == ADC_5V_BATRTC_CAPDIV)) 205 206 /* Exported Functions ------------------------------------------------------- */ 207 /* ADC Exported Functions Group1: 208 (De)Initialization -------------------------*/ 209 void ADC_DeInit(void); 210 void ADC_StructInit(ADCInitType* ADC_InitStruct); 211 void ADC_Init(ADCInitType* ADC_InitStruct); 212 /* ADC Exported Functions Group2: 213 Get NVR Info, Calculate datas --------------*/ 214 uint32_t ADC_CalculateVoltage(uint32_t Mode, int16_t adc_data, float *Voltage); 215 uint32_t ADC_GetVDDVoltage_Fast(uint32_t Division, ADC_CalResType *CalResults); 216 uint32_t ADC_GetVDDVoltage_Normal(uint32_t Division, ADC_CalResType *CalResults); 217 uint32_t ADC_GetBATRTCVoltage_Fast(uint32_t Division, ADC_CalResType *CalResults); 218 uint32_t ADC_GetBATRTCVoltage_Normal(uint32_t Division, ADC_CalResType *CalResults); 219 uint32_t ADC_GetTemperature(ADC_CalResType *CalResults); 220 /* ADC Exported Functions Group3: 221 Interrupt (flag) ---------------------------*/ 222 int16_t ADC_GetADCConversionValue(uint32_t Channel); 223 void ADC_INTConfig(uint32_t INTMask, uint32_t NewState); 224 uint8_t ADC_GetAutoDoneFlag(void); 225 uint8_t ADC_GetManualDoneFlag(void); 226 void ADC_ClearAutoDoneFlag(void); 227 void ADC_ClearManualDoneFlag(void); 228 /* ADC Exported Functions Group4: 229 MISC Configuration -------------------------*/ 230 uint32_t ADC_Cmd(uint32_t NewState); 231 void ADC_StartManual(void); 232 void ADC_WaitForManual(void); 233 void ADC_TrigSourceConfig(uint32_t TrigSource); 234 void ADC_RESDivisionCmd(uint32_t NewState); 235 void ADC_CAPDivisionCmd(uint32_t NewState); 236 //CIC Control 237 void ADC_CICAlwaysOnCmd(uint32_t NewState); 238 void ADC_CICINVCmd(uint32_t NewState); 239 void ADC_CICScaleDownConfig(uint32_t ScaleDown); 240 void ADC_CICSkipConfig(uint32_t Skip); 241 void ADC_CICDownSamRateConfig(uint32_t DSRSelection); 242 243 #ifdef __cplusplus 244 } 245 #endif 246 247 #endif /* __LIB_ADC_H */ 248 249 /*********************************** END OF FILE ******************************/ 250