1 /** 2 ****************************************************************************** 3 * @file lib_pwm.h 4 * @author Application Team 5 * @version V1.1.0 6 * @date 2019-10-28 7 * @brief PWM library. 8 ****************************************************************************** 9 * @attention 10 * 11 ****************************************************************************** 12 */ 13 #ifndef __LIB_PWM_H 14 #define __LIB_PWM_H 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 #include "target.h" 21 22 typedef struct 23 { 24 uint32_t ClockDivision; 25 uint32_t Mode; 26 uint32_t ClockSource; 27 } PWM_BaseInitType; 28 29 /************** Bits definition for PWMx_CTL register ******************/ 30 #define PWM_CTL_TESL_APBDIV128 (0x0U << PWM_CTL_TSEL_Pos) /*!< 0x00000000 */ 31 #define PWM_CTL_TESL_APBDIV1 (0x1U << PWM_CTL_TSEL_Pos) /*!< 0x00000008 */ 32 #define PWM_CTL_MC_STOP (0x0U << PWM_CTL_MC_Pos) /*!< 0x00000000 */ 33 #define PWM_CTL_MC_UP (0x1U << PWM_CTL_MC_Pos) /*!< 0x00000010 */ 34 #define PWM_CTL_MC_CONTINUE (0x2U << PWM_CTL_MC_Pos) /*!< 0x00000020 */ 35 #define PWM_CTL_MC_UPDOWN (0x3U << PWM_CTL_MC_Pos) /*!< 0x00000030 */ 36 #define PWM_CTL_ID_DIV2 (0x0U << PWM_CTL_ID_Pos) /*!< 0x00000000 */ 37 #define PWM_CTL_ID_DIV4 (0x1U << PWM_CTL_ID_Pos) /*!< 0x00000040 */ 38 #define PWM_CTL_ID_DIV8 (0x2U << PWM_CTL_ID_Pos) /*!< 0x00000080 */ 39 #define PWM_CTL_ID_DIV16 (0x3U << PWM_CTL_ID_Pos) /*!< 0x000000C0 */ 40 41 /************** Bits definition for PWMx_TAR register ******************/ 42 43 /************** Bits definition for PWMx_CCTLy register ******************/ 44 ////////////#define PWM_CCTL_OUTMOD_CONST (0x00UL << PWM_CCTL_OUTMOD_Pos) 45 #define PWM_CCTL_OUTMOD_SET (0x01UL << PWM_CCTL_OUTMOD_Pos) 46 #define PWM_CCTL_OUTMOD_TOGGLE_RESET (0x02UL << PWM_CCTL_OUTMOD_Pos) 47 #define PWM_CCTL_OUTMOD_SET_RESET (0x03UL << PWM_CCTL_OUTMOD_Pos) 48 #define PWM_CCTL_OUTMOD_TOGGLE (0x04UL << PWM_CCTL_OUTMOD_Pos) 49 #define PWM_CCTL_OUTMOD_RESET (0x05UL << PWM_CCTL_OUTMOD_Pos) 50 #define PWM_CCTL_OUTMOD_TOGGLE_SET (0x06UL << PWM_CCTL_OUTMOD_Pos) 51 #define PWM_CCTL_OUTMOD_RESET_SET (0x07UL << PWM_CCTL_OUTMOD_Pos) 52 //////////////////// 53 54 //ClockDivision 55 #define PWM_CLKDIV_2 (0x0U << PWM_CTL_ID_Pos) 56 #define PWM_CLKDIV_4 (0x1U << PWM_CTL_ID_Pos) 57 #define PWM_CLKDIV_8 (0x2U << PWM_CTL_ID_Pos) 58 #define PWM_CLKDIV_16 (0x3U << PWM_CTL_ID_Pos) 59 #define IS_PWM_CLKDIV(__CLKDIV__) (((__CLKDIV__) == PWM_CLKDIV_2) ||\ 60 ((__CLKDIV__) == PWM_CLKDIV_4) ||\ 61 ((__CLKDIV__) == PWM_CLKDIV_8) ||\ 62 ((__CLKDIV__) == PWM_CLKDIV_16)) 63 64 //Mode 65 #define PWM_MODE_STOP (0x0U << PWM_CTL_MC_Pos) 66 #define PWM_MODE_UPCOUNT (0x1U << PWM_CTL_MC_Pos) 67 #define PWM_MODE_CONTINUOUS (0x2U << PWM_CTL_MC_Pos) 68 #define PWM_MODE_UPDOWN (0x3U << PWM_CTL_MC_Pos) 69 #define IS_PWM_CNTMODE(__CNTMODE__) (((__CNTMODE__) == PWM_MODE_STOP) ||\ 70 ((__CNTMODE__) == PWM_MODE_UPCOUNT) ||\ 71 ((__CNTMODE__) == PWM_MODE_CONTINUOUS) ||\ 72 ((__CNTMODE__) == PWM_MODE_UPDOWN)) 73 74 //ClockSource 75 #define PWM_CLKSRC_APB (0x1U << PWM_CTL_TSEL_Pos) 76 #define PWM_CLKSRC_APBD128 (0x0U << PWM_CTL_TSEL_Pos) 77 #define IS_PWM_CLKSRC(__CLKSRC__) (((__CLKSRC__) == PWM_CLKSRC_APB) ||\ 78 ((__CLKSRC__) == PWM_CLKSRC_APBD128)) 79 80 typedef struct 81 { 82 uint32_t Channel; 83 uint32_t Period; 84 uint32_t OutMode; 85 } PWM_OCInitType; 86 typedef struct 87 { 88 uint32_t Channel; 89 uint32_t CaptureMode; 90 } PWM_ICInitType; 91 //Channel 92 #define PWM_CHANNEL_0 (0UL) 93 #define PWM_CHANNEL_1 (1UL) 94 #define PWM_CHANNEL_2 (2UL) 95 #define IS_PWM_CHANNEL(__CHANNEL__) (((__CHANNEL__) == PWM_CHANNEL_0) ||\ 96 ((__CHANNEL__) == PWM_CHANNEL_1) ||\ 97 ((__CHANNEL__) == PWM_CHANNEL_2)) 98 //OutMode 99 #define PWM_OUTMOD_CONST (0x0U << PWM_CCTL_OUTMOD_Pos) 100 #define PWM_OUTMOD_SET (0x1U << PWM_CCTL_OUTMOD_Pos) 101 #define PWM_OUTMOD_TOGGLE_RESET (0x2U << PWM_CCTL_OUTMOD_Pos) 102 #define PWM_OUTMOD_SET_RESET (0x3U << PWM_CCTL_OUTMOD_Pos) 103 #define PWM_OUTMOD_TOGGLE (0x4U << PWM_CCTL_OUTMOD_Pos) 104 #define PWM_OUTMOD_RESET (0x5U << PWM_CCTL_OUTMOD_Pos) 105 #define PWM_OUTMOD_TOGGLE_SET (0x6U << PWM_CCTL_OUTMOD_Pos) 106 #define PWM_OUTMOD_RESET_SET (0x7U << PWM_CCTL_OUTMOD_Pos) 107 #define IS_PWM_OUTMODE(__OUTMODE__) (((__OUTMODE__) == PWM_OUTMOD_CONST) ||\ 108 ((__OUTMODE__) == PWM_OUTMOD_SET) ||\ 109 ((__OUTMODE__) == PWM_OUTMOD_TOGGLE_RESET) ||\ 110 ((__OUTMODE__) == PWM_OUTMOD_SET_RESET) ||\ 111 ((__OUTMODE__) == PWM_OUTMOD_TOGGLE) ||\ 112 ((__OUTMODE__) == PWM_OUTMOD_RESET) ||\ 113 ((__OUTMODE__) == PWM_OUTMOD_TOGGLE_SET) ||\ 114 ((__OUTMODE__) == PWM_OUTMOD_RESET_SET)) 115 116 //CaptureMode 117 #define PWM_CM_DISABLE (0x0U << PWM_CCTL_CM_Pos) 118 #define PWM_CM_RISING (0x1U << PWM_CCTL_CM_Pos) 119 #define PWM_CM_FALLING (0x2U << PWM_CCTL_CM_Pos) 120 #define PWM_CM_BOTH (0x3U << PWM_CCTL_CM_Pos) 121 #define IS_PWM_CAPMODE(__CAPMODE__) (((__CAPMODE__) == PWM_CM_DISABLE) ||\ 122 ((__CAPMODE__) == PWM_CM_RISING) ||\ 123 ((__CAPMODE__) == PWM_CM_FALLING) ||\ 124 ((__CAPMODE__) == PWM_CM_BOTH)) 125 126 //Interrupt 127 #define PWM_INT_CCIFG PWM_CCTL_CCIFG 128 #define PWM_INT_COV PWM_CCTL_COV 129 #define PWM_INT_Msk (PWM_INT_CCIFG | PWM_INT_COV) 130 #define IS_PWM_INTFLAGR(__INTFLAGR__) (((__INTFLAGR__) == PWM_INT_CCIFG) ||\ 131 ((__INTFLAGR__) == PWM_INT_COV)) 132 #define IS_PWM_INTFLAGC(__INTFLAGC__) ((((__INTFLAGC__) & PWM_INT_Msk) != 0U) &&\ 133 (((__INTFLAGC__) & ~PWM_INT_Msk) == 0U)) 134 135 //PWM output selection 136 #define PWM0_OUT0 0 137 #define PWM0_OUT1 1 138 #define PWM0_OUT2 2 139 #define PWM1_OUT0 4 140 #define PWM1_OUT1 5 141 #define PWM1_OUT2 6 142 #define PWM2_OUT0 8 143 #define PWM2_OUT1 9 144 #define PWM2_OUT2 10 145 #define PWM3_OUT0 12 146 #define PWM3_OUT1 13 147 #define PWM3_OUT2 14 148 #define IS_PWM_OUTSEL(__OUTSEL__) (((__OUTSEL__) == PWM0_OUT0) ||\ 149 ((__OUTSEL__) == PWM0_OUT1) ||\ 150 ((__OUTSEL__) == PWM0_OUT2) ||\ 151 ((__OUTSEL__) == PWM1_OUT0) ||\ 152 ((__OUTSEL__) == PWM1_OUT1) ||\ 153 ((__OUTSEL__) == PWM1_OUT2) ||\ 154 ((__OUTSEL__) == PWM2_OUT0) ||\ 155 ((__OUTSEL__) == PWM2_OUT1) ||\ 156 ((__OUTSEL__) == PWM2_OUT2) ||\ 157 ((__OUTSEL__) == PWM3_OUT0) ||\ 158 ((__OUTSEL__) == PWM3_OUT1) ||\ 159 ((__OUTSEL__) == PWM3_OUT2)) 160 161 //outline 162 #define PWM_OLINE_0 1 163 #define PWM_OLINE_1 2 164 #define PWM_OLINE_2 4 165 #define PWM_OLINE_3 8 166 #define PWM_OLINE_Msk 0xF 167 #define IS_PWM_OUTLINE(__OUTLINE__) ((((__OUTLINE__) & PWM_OLINE_Msk) != 0U) &&\ 168 (((__OUTLINE__) & ~PWM_OLINE_Msk) == 0U)) 169 170 //inline 171 #define PWM_ILINE_0 0 172 #define PWM_ILINE_1 1 173 #define PWM_ILINE_2 2 174 #define PWM_ILINE_3 3 175 #define IS_PWM_INLINE(__INLINE__) (((__INLINE__) == PWM_ILINE_0) ||\ 176 ((__INLINE__) == PWM_ILINE_1) ||\ 177 ((__INLINE__) == PWM_ILINE_2) ||\ 178 ((__INLINE__) == PWM_ILINE_3)) 179 180 //PWM input selection 181 #define PWM1_IN2 0x014 182 #define PWM1_IN1 0x012 183 #define PWM1_IN0 0x010 184 #define PWM0_IN2 0x004 185 #define PWM0_IN1 0x002 186 #define PWM0_IN0 0x000 187 #define PWM3_IN2 0x114 188 #define PWM3_IN1 0x112 189 #define PWM3_IN0 0x110 190 #define PWM2_IN2 0x104 191 #define PWM2_IN1 0x102 192 #define PWM2_IN0 0x100 193 #define IS_PWM_INSEL(__INSEL__) (((__INSEL__) == PWM1_IN2) ||\ 194 ((__INSEL__) == PWM1_IN1) ||\ 195 ((__INSEL__) == PWM1_IN0) ||\ 196 ((__INSEL__) == PWM0_IN2) ||\ 197 ((__INSEL__) == PWM0_IN1) ||\ 198 ((__INSEL__) == PWM0_IN0) ||\ 199 ((__INSEL__) == PWM3_IN2) ||\ 200 ((__INSEL__) == PWM3_IN1) ||\ 201 ((__INSEL__) == PWM3_IN0) ||\ 202 ((__INSEL__) == PWM2_IN2) ||\ 203 ((__INSEL__) == PWM2_IN1) ||\ 204 ((__INSEL__) == PWM2_IN0)) 205 206 //Level 207 #define PWM_LEVEL_HIGH (0x1U << PWM_CCTL_OUT_Pos) 208 #define PWM_LEVEL_LOW 0 209 #define IS_PWM_OUTLVL(__OUTLVL__) (((__OUTLVL__) == PWM_LEVEL_HIGH) ||\ 210 ((__OUTLVL__) == PWM_LEVEL_LOW)) 211 212 #define IS_PWM_CCR(__CCR__) ((__CCR__) < 0x10000U) 213 214 215 /****************************** PWM Instances *********************************/ 216 #define IS_PWM_ALL_INSTANCE(INSTANCE) (((INSTANCE) == PWM0) || \ 217 ((INSTANCE) == PWM1) || \ 218 ((INSTANCE) == PWM2) || \ 219 ((INSTANCE) == PWM3)) 220 221 #define IS_PWMMUX_ALL_INSTANCE(INSTANCE) ((INSTANCE) == PWMMUX) 222 223 /* Exported Functions ------------------------------------------------------- */ 224 /* PWM Exported Functions Group1: 225 Initialization ----------------------------*/ 226 void PWM_BaseInit(PWM_Type *PWMx, PWM_BaseInitType *InitStruct); 227 void PWM_BaseStructInit(PWM_BaseInitType *InitStruct); 228 void PWM_OCStructInit(PWM_OCInitType *OCInitType); 229 void PWM_OCInit(PWM_Type *PWMx, PWM_OCInitType *OCInitType); 230 void PWM_ICStructInit(PWM_ICInitType *ICInitType); 231 void PWM_ICInit(PWM_Type *PWMx, PWM_ICInitType *ICInitType); 232 /* PWM Exported Functions Group2: 233 Interrupt ---------------------------------*/ 234 void PWM_BaseINTConfig(PWM_Type *PWMx, uint32_t NewState); 235 uint8_t PWM_GetBaseINTStatus(PWM_Type *PWMx); 236 void PWM_ClearBaseINTStatus(PWM_Type *PWMx); 237 void PWM_ChannelINTConfig(PWM_Type *PWMx, uint32_t Channel, uint32_t NewState); 238 uint8_t PWM_GetChannelINTStatus(PWM_Type *PWMx, uint32_t Channel, uint32_t IntMask); 239 void PWM_ClearChannelINTStatus(PWM_Type *PWMx, uint32_t Channel, uint32_t IntMask); 240 /* PWM Exported Functions Group3: 241 MISC --------------------------------------*/ 242 void PWM_ClearCounter(PWM_Type *PWMx); 243 void PWM_CCRConfig(PWM_Type *PWMx, uint32_t Channel, uint16_t Period); 244 //Compare output 245 void PWM_OLineConfig(uint32_t OutSelection, uint32_t OLine); 246 void PWM_OutputCmd(PWM_Type *PWMx, uint32_t Channel, uint32_t NewState); 247 void PWM_SetOutLevel(PWM_Type *PWMx, uint32_t Channel, uint32_t Level); 248 void PWM_ILineConfig(uint32_t InSelection, uint32_t ILine); 249 uint8_t PWM_GetSCCI(PWM_Type *PWMx, uint32_t Channel); 250 uint32_t PWM_GetCapture(PWM_Type *PWMx, uint32_t Channel); 251 252 #ifdef __cplusplus 253 } 254 #endif 255 256 #endif /* __LIB_PWM_H */ 257 258 /*********************************** END OF FILE ******************************/ 259