1 /** 2 ****************************************************************************** 3 * @file lib_spi.h 4 * @author Application Team 5 * @version V1.1.0 6 * @date 2019-10-28 7 * @brief SPI library. 8 ****************************************************************************** 9 * @attention 10 * 11 ****************************************************************************** 12 */ 13 #ifndef __LIB_SPI_H 14 #define __LIB_SPI_H 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 #include "target.h" 21 22 typedef struct 23 { 24 uint32_t Mode; 25 uint32_t SPH; 26 uint32_t SPO; 27 uint32_t ClockDivision; 28 uint32_t CSNSoft; 29 uint32_t SWAP; 30 } SPI_InitType; 31 32 /************** Bits definition for SPIx_CTRL register ******************/ 33 #define SPI_CTRL_SCKSEL_0 (0x1U << SPI_CTRL_SCKSEL_Pos) /*!< 0x00000001 */ 34 #define SPI_CTRL_SCKSEL_1 (0x2U << SPI_CTRL_SCKSEL_Pos) /*!< 0x00000002 */ 35 #define SPI_CTRL_SCKSEL_2 (0x4U << SPI_CTRL_SCKSEL_Pos) /*!< 0x00000004 */ 36 37 /************** Bits definition for SPIx_TXSTS register ******************/ 38 #define SPI_TXSTS_TXFFLAG_0 (0x1U << SPI_TXSTS_TXFFLAG_Pos) /*!< 0x00000001 */ 39 #define SPI_TXSTS_TXFFLAG_1 (0x2U << SPI_TXSTS_TXFFLAG_Pos) /*!< 0x00000002 */ 40 #define SPI_TXSTS_TXFFLAG_2 (0x4U << SPI_TXSTS_TXFFLAG_Pos) /*!< 0x00000004 */ 41 #define SPI_TXSTS_TXFFLAG_3 (0x8U << SPI_TXSTS_TXFFLAG_Pos) /*!< 0x00000008 */ 42 #define SPI_TXSTS_TXFLEV_0 (0x1U << SPI_TXSTS_TXFLEV_Pos) /*!< 0x00000010 */ 43 #define SPI_TXSTS_TXFLEV_1 (0x2U << SPI_TXSTS_TXFLEV_Pos) /*!< 0x00000020 */ 44 #define SPI_TXSTS_TXFLEV_2 (0x4U << SPI_TXSTS_TXFLEV_Pos) /*!< 0x00000040 */ 45 46 /************** Bits definition for SPIx_TXDAT register ******************/ 47 48 /************** Bits definition for SPIx_RXSTS register ******************/ 49 #define SPI_RXSTS_RXFFLAG_0 (0x1U << SPI_RXSTS_RXFFLAG_Pos) /*!< 0x00000001 */ 50 #define SPI_RXSTS_RXFFLAG_1 (0x2U << SPI_RXSTS_RXFFLAG_Pos) /*!< 0x00000002 */ 51 #define SPI_RXSTS_RXFFLAG_2 (0x4U << SPI_RXSTS_RXFFLAG_Pos) /*!< 0x00000004 */ 52 #define SPI_RXSTS_RXFFLAG_3 (0x8U << SPI_RXSTS_RXFFLAG_Pos) /*!< 0x00000008 */ 53 #define SPI_RXSTS_RXFLEV_0 (0x1U << SPI_RXSTS_RXFLEV_Pos) /*!< 0x00000010 */ 54 #define SPI_RXSTS_RXFLEV_1 (0x2U << SPI_RXSTS_RXFLEV_Pos) /*!< 0x00000020 */ 55 #define SPI_RXSTS_RXFLEV_2 (0x4U << SPI_RXSTS_RXFLEV_Pos) /*!< 0x00000040 */ 56 //Mode 57 #define SPI_MODE_MASTER 0 58 #define SPI_MODE_SLAVE SPI_CTRL_MOD 59 //SPH 60 #define SPI_SPH_0 0 61 #define SPI_SPH_1 SPI_CTRL_SCKPHA 62 //SPO 63 #define SPI_SPO_0 0 64 #define SPI_SPO_1 SPI_CTRL_SCKPOL 65 //ClockDivision 66 #define SPI_CLKDIV_2 (0) 67 #define SPI_CLKDIV_4 (SPI_CTRL_SCKSEL_0) 68 #define SPI_CLKDIV_8 (SPI_CTRL_SCKSEL_1) 69 #define SPI_CLKDIV_16 (SPI_CTRL_SCKSEL_0 | SPI_CTRL_SCKSEL_1) 70 #define SPI_CLKDIV_32 (SPI_CTRL_SCKSEL_2) 71 #define SPI_CLKDIV_64 (SPI_CTRL_SCKSEL_0 | SPI_CTRL_SCKSEL_2) 72 #define SPI_CLKDIV_128 (SPI_CTRL_SCKSEL_1 | SPI_CTRL_SCKSEL_2) 73 //CSNSoft 74 #define SPI_CSNSOFT_ENABLE SPI_CTRL_CSGPIO 75 #define SPI_CSNSOFT_DISABLE 0 76 //SWAP 77 #define SPI_SWAP_ENABLE SPI_CTRL_SWAP 78 #define SPI_SWAP_DISABLE 0 79 80 //INT 81 #define SPI_INT_TX (0x80000000|SPI_TXSTS_TXIEN) 82 #define SPI_INT_RX (0x40000000|SPI_RXSTS_RXIEN) 83 84 //status 85 #define SPI_STS_TXIF (0x80000000|SPI_TXSTS_TXIF) 86 #define SPI_STS_TXEMPTY (0x80000000|SPI_TXSTS_TXEMPTY) 87 #define SPI_STS_TXFUR (0x80000000|SPI_TXSTS_TXFUR) 88 #define SPI_STS_DMATXDONE (0x80000000|SPI_TXSTS_DMATXDONE) 89 #define SPI_STS_RXIF (0x40000000|SPI_RXSTS_RXIF) 90 #define SPI_STS_RXFULL (0x40000000|SPI_RXSTS_RXFULL) 91 #define SPI_STS_RXFOV (0x40000000|SPI_RXSTS_RXFOV) 92 #define SPI_STS_BSY (0x20000000|SPI_MISC_BSY) 93 #define SPI_STS_RFF (0x20000000|SPI_MISC_RFF) 94 #define SPI_STS_RNE (0x20000000|SPI_MISC_RNE) 95 #define SPI_STS_TNF (0x20000000|SPI_MISC_TNF) 96 #define SPI_STS_TFE (0x20000000|SPI_MISC_TFE) 97 98 //TXFLEV 99 #define SPI_TXFLEV_0 (0) 100 #define SPI_TXFLEV_1 (SPI_TXSTS_TXFLEV_0) 101 #define SPI_TXFLEV_2 (SPI_TXSTS_TXFLEV_1) 102 #define SPI_TXFLEV_3 (SPI_TXSTS_TXFLEV_0 | SPI_TXSTS_TXFLEV_1) 103 #define SPI_TXFLEV_4 (SPI_TXSTS_TXFLEV_2) 104 #define SPI_TXFLEV_5 (SPI_TXSTS_TXFLEV_0 | SPI_TXSTS_TXFLEV_2) 105 #define SPI_TXFLEV_6 (SPI_TXSTS_TXFLEV_1 | SPI_TXSTS_TXFLEV_2) 106 #define SPI_TXFLEV_7 (SPI_TXSTS_TXFLEV_0 | SPI_TXSTS_TXFLEV_1 | SPI_TXSTS_TXFLEV_2) 107 108 //RXFLEV 109 #define SPI_RXFLEV_0 (0) 110 #define SPI_RXFLEV_1 (SPI_RXSTS_RXFLEV_0) 111 #define SPI_RXFLEV_2 (SPI_RXSTS_RXFLEV_1) 112 #define SPI_RXFLEV_3 (SPI_RXSTS_RXFLEV_0 | SPI_RXSTS_RXFLEV_1) 113 #define SPI_RXFLEV_4 (SPI_RXSTS_RXFLEV_2) 114 #define SPI_RXFLEV_5 (SPI_RXSTS_RXFLEV_2 | SPI_RXSTS_RXFLEV_0) 115 #define SPI_RXFLEV_6 (SPI_RXSTS_RXFLEV_2 | SPI_RXSTS_RXFLEV_1) 116 #define SPI_RXFLEV_7 (SPI_RXSTS_RXFLEV_2 | SPI_RXSTS_RXFLEV_1 | SPI_RXSTS_RXFLEV_0) 117 118 119 /* Private macros ------------------------------------------------------------*/ 120 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_MASTER) || ((__MODE__) == SPI_MODE_SLAVE)) 121 122 #define IS_SPI_SPH(__SPH__) (((__SPH__) == SPI_SPH_0) || ((__SPH__) == SPI_SPH_1)) 123 124 #define IS_SPI_SPO(__SPO__) (((__SPO__) == SPI_SPO_0) || ((__SPO__) == SPI_SPO_1)) 125 126 #define IS_SPI_CLKDIV(__CLKDIV__) (((__CLKDIV__) == SPI_CLKDIV_2) ||\ 127 ((__CLKDIV__) == SPI_CLKDIV_4) ||\ 128 ((__CLKDIV__) == SPI_CLKDIV_8) ||\ 129 ((__CLKDIV__) == SPI_CLKDIV_16) ||\ 130 ((__CLKDIV__) == SPI_CLKDIV_32) ||\ 131 ((__CLKDIV__) == SPI_CLKDIV_64) ||\ 132 ((__CLKDIV__) == SPI_CLKDIV_128)) 133 134 #define IS_SPI_CSN(__CSN__) (((__CSN__) == SPI_CSNSOFT_ENABLE) || ((__CSN__) == SPI_CSNSOFT_DISABLE)) 135 136 #define IS_SPI_SWAP(__SWAP__) (((__SWAP__) == SPI_SWAP_ENABLE) || ((__SWAP__) == SPI_SWAP_DISABLE)) 137 138 #define IS_SPI_INT(__INT__) ((((__INT__) & (SPI_INT_TX | SPI_INT_RX)) != 0U) &&\ 139 (((__INT__) & ~(SPI_INT_TX | SPI_INT_RX)) == 0U)) 140 141 #define IS_SPI_STSR(__STSR__) (((__STSR__) == SPI_STS_TXIF) ||\ 142 ((__STSR__) == SPI_STS_TXEMPTY) ||\ 143 ((__STSR__) == SPI_STS_TXFUR) ||\ 144 ((__STSR__) == SPI_STS_DMATXDONE) ||\ 145 ((__STSR__) == SPI_STS_RXFULL) ||\ 146 ((__STSR__) == SPI_STS_RXFOV) ||\ 147 ((__STSR__) == SPI_STS_BSY) ||\ 148 ((__STSR__) == SPI_STS_RFF) ||\ 149 ((__STSR__) == SPI_STS_RNE) ||\ 150 ((__STSR__) == SPI_STS_TNF) ||\ 151 ((__STSR__) == SPI_STS_TFE) ||\ 152 ((__STSR__) == SPI_STS_RXIF)) 153 154 #define IS_SPI_STSC(__STSC__) ((((__STSC__) & (SPI_STS_TXIF | SPI_STS_RXIF | SPI_STS_DMATXDONE)) != 0U) &&\ 155 (((__STSC__) & ~(SPI_STS_TXIF | SPI_STS_RXIF | SPI_STS_DMATXDONE)) == 0U)) 156 157 #define IS_SPI_TXFLEV(__TXFLEV__) (((__TXFLEV__) == SPI_TXFLEV_0) ||\ 158 ((__TXFLEV__) == SPI_TXFLEV_1) ||\ 159 ((__TXFLEV__) == SPI_TXFLEV_2) ||\ 160 ((__TXFLEV__) == SPI_TXFLEV_3) ||\ 161 ((__TXFLEV__) == SPI_TXFLEV_4) ||\ 162 ((__TXFLEV__) == SPI_TXFLEV_5) ||\ 163 ((__TXFLEV__) == SPI_TXFLEV_6) ||\ 164 ((__TXFLEV__) == SPI_TXFLEV_7)) 165 166 #define IS_SPI_RXFLEV(__RXFLEV__) (((__RXFLEV__) == SPI_RXFLEV_0) ||\ 167 ((__RXFLEV__) == SPI_RXFLEV_1) ||\ 168 ((__RXFLEV__) == SPI_RXFLEV_2) ||\ 169 ((__RXFLEV__) == SPI_RXFLEV_3) ||\ 170 ((__RXFLEV__) == SPI_RXFLEV_4) ||\ 171 ((__RXFLEV__) == SPI_RXFLEV_5) ||\ 172 ((__RXFLEV__) == SPI_RXFLEV_6) ||\ 173 ((__RXFLEV__) == SPI_RXFLEV_7)) 174 175 /****************************** SPI Instances *********************************/ 176 #define IS_SPI_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI1) || \ 177 ((INSTANCE) == SPI2) || \ 178 ((INSTANCE) == SPI3)) 179 180 /* Exported Functions ------------------------------------------------------- */ 181 /* SPI Exported Functions Group1: 182 (De)Initialization -------------------------*/ 183 void SPI_DeviceInit(SPI_Type *SPIx); 184 void SPI_Init(SPI_Type *SPIx, SPI_InitType *InitStruct); 185 void SPI_StructInit(SPI_InitType *InitStruct); 186 /* SPI Exported Functions Group2: 187 Interrupt (flag) ---------------------------*/ 188 void SPI_INTConfig(SPI_Type *SPIx, uint32_t INTMask, uint32_t NewState); 189 uint8_t SPI_GetStatus(SPI_Type *SPIx, uint32_t Status); 190 void SPI_ClearStatus(SPI_Type *SPIx, uint32_t Status); 191 /* SPI Exported Functions Group3: 192 Transfer datas -----------------------------*/ 193 void SPI_SendData(SPI_Type *SPIx, uint8_t ch); 194 uint8_t SPI_ReceiveData(SPI_Type *SPIx); 195 /* SPI Exported Functions Group4: 196 MISC Configuration -------------------------*/ 197 void SPI_Cmd(SPI_Type *SPIx, uint32_t NewState); 198 void SPI_TransmitFIFOLevelConfig(SPI_Type *SPIx, uint32_t FIFOLevel); 199 void SPI_ReceiveFIFOLevelConfig(SPI_Type *SPIx, uint32_t FIFOLevel); 200 uint8_t SPI_GetTransmitFIFOLevel(SPI_Type *SPIx); 201 uint8_t SPI_GetReceiveFIFOLevel(SPI_Type *SPIx); 202 void SPI_SmartModeCmd(SPI_Type *SPIx, uint32_t NewState); 203 void SPI_OverWriteModeCmd(SPI_Type *SPIx, uint32_t NewState); 204 205 206 #ifdef __cplusplus 207 } 208 #endif 209 210 #endif /* __LIB_SPI_H */ 211 212 /*********************************** END OF FILE ******************************/ 213