1/*********************** (C) COPYRIGHT 2020 Aisinochip *************************
2;* File Name          : Startup_ACM32F4.s
3;* Author             : AisinoChip Firmware Team
4;* Version            : V1.0.0
5;* Date               : 2020
6;* Description        : ACM32F4 Devices vector table for GCC toolchain.
7;*                      This module performs:
8;*                      - Set the initial SP
9;*                      - Set the initial PC == Reset_Handler
10;*                      - Set the vector table entries with the exceptions ISR address
11;*                      - Configure the clock system
12;*                      - Branches to __main in the C library (which eventually
13;*                        calls main()).
14;*                      After Reset the Cortex-M33 processor is in Thread mode,
15;*                      priority is Privileged, and the Stack is set to Main.
16;********************************************************************************
17;* @attention
18;*
19;* Copyright (c) 2020 AisinoChip.
20;* All rights reserved.
21;*******************************************************************************/
22
23  .syntax unified
24  .cpu cortex-m33
25  .fpu softvfp
26  .thumb
27
28.global g_pfnVectors
29.global Default_Handler
30
31/* start address for the initialization values of the .data section.
32defined in linker script */
33.word _sidata
34/* start address for the .data section. defined in linker script */
35.word _sdata
36/* end address for the .data section. defined in linker script */
37.word _edata
38/* start address for the .bss section. defined in linker script */
39.word _sbss
40/* end address for the .bss section. defined in linker script */
41.word _ebss
42
43/*.equ  BootRAM, 0xF108F85F */
44
45/**
46 * @brief  This is the code that gets called when the processor first
47 *          starts execution following a reset event. Only the absolutely
48 *          necessary set is performed, after which the application
49 *          supplied main() routine is called.
50 * @param  None
51 * @retval : None
52*/
53
54  .section .text.Reset_Handler
55  .weak Reset_Handler
56  .type Reset_Handler, %function
57Reset_Handler:
58
59/* Copy the data segment initializers from flash to SRAM */
60  movs r1, #0
61  b LoopCopyDataInit
62
63CopyDataInit:
64  ldr r3, =_sidata
65  ldr r3, [r3, r1]
66  str r3, [r0, r1]
67  adds r1, r1, #4
68
69LoopCopyDataInit:
70  ldr r0, =_sdata
71  ldr r3, =_edata
72  adds r2, r0, r1
73  cmp r2, r3
74  bcc CopyDataInit
75  ldr r2, =_sbss
76  b LoopFillZerobss
77/* Zero fill the bss segment. */
78FillZerobss:
79  movs r3, #0
80  str r3, [r2], #4
81
82LoopFillZerobss:
83  ldr r3, = _ebss
84  cmp r2, r3
85  bcc FillZerobss
86
87/* Call the clock system intitialization function.*/
88  /*  bl  SystemInit */
89/* Call static constructors */
90  /*  bl __libc_init_array */
91/* Call the application's entry point.*/
92  bl entry
93  bx lr
94.size Reset_Handler, .-Reset_Handler
95
96/**
97 * @brief  This is the code that gets called when the processor receives an
98 *         unexpected interrupt.  This simply enters an infinite loop, preserving
99 *         the system state for examination by a debugger.
100 *
101 * @param  None
102 * @retval : None
103*/
104    .section .text.Default_Handler,"ax",%progbits
105Default_Handler:
106Infinite_Loop:
107  b Infinite_Loop
108  .size Default_Handler, .-Default_Handler
109/******************************************************************************
110*
111* The minimal vector table for a Cortex M3.  Note that the proper constructs
112* must be placed on this to ensure that it ends up at physical address
113* 0x0000.0000.
114*
115******************************************************************************/
116  .section .isr_vector,"a",%progbits
117  .type g_pfnVectors, %object
118  .size g_pfnVectors, .-g_pfnVectors
119
120
121g_pfnVectors:
122
123  .word _estack
124  .word Reset_Handler
125  .word NMI_Handler
126  .word HardFault_Handler
127  .word MemManage_Handler
128  .word BusFault_Handler
129  .word UsageFault_Handler
130  .word 0
131  .word 0
132  .word 0
133  .word 0
134  .word SVC_Handler
135  .word DebugMon_Handler
136  .word 0
137  .word PendSV_Handler
138  .word SysTick_Handler
139
140  /* External Interrupts */
141  .word WDT_IRQHandler
142  .word RTC_IRQHandler
143  .word EFC_IRQHandler
144  .word GPIOAB_IRQHandler
145  .word GPIOCD_IRQHandler
146  .word EXIT_IRQHandler
147  .word SRAM_PAPITY_IRQHandler
148  .word CLKRDY_IRQHandler
149  .word UART4_IRQHandler
150  .word DMA_IRQHandler
151  .word UART3_IRQHandler
152  .word RSV_IRQHandler
153  .word ADC_IRQHandler
154  .word TIM1_BRK_UP_TRG_COM_IRQHandler
155  .word TIM1_CC_IRQHandler
156  .word TIM2_IRQHandler
157  .word TIM3_IRQHandler
158  .word TIM6_IRQHandler
159  .word TIM7_IRQHandler
160  .word TIM14_IRQHandler
161  .word TIM15_IRQHandler
162  .word TIM16_IRQHandler
163  .word TIM17_IRQHandler
164  .word I2C1_IRQHandler
165  .word I2C2_IRQHandler
166  .word SPI1_IRQHandler
167  .word SPI2_IRQHandler
168  .word UART1_IRQHandler
169  .word UART2_IRQHandler
170  .word LPUART_IRQHandler
171  .word SPI3_IRQHandler
172  .word AES_IRQHandler
173  .word USB_IRQHandler
174  .word DAC_IRQHandler
175  .word I2S_IRQHandler
176  .word GPIOEF_IRQHandler
177  .word CAN1_IRQHandler
178  .word CAN2_IRQHandler
179  .word FPU_IRQHandler
180  .word TIM4_IRQHandler
181  .word SPI4_IRQHandler
182
183
184
185/*******************************************************************************
186*
187* Provide weak aliases for each Exception handler to the Default_Handler.
188* As they are weak aliases, any function with the same name will override
189* this definition.
190*
191*******************************************************************************/
192
193  .weak NMI_Handler
194  .thumb_set NMI_Handler,Default_Handler
195
196  .weak HardFault_Handler
197  .thumb_set HardFault_Handler,Default_Handler
198
199  .weak MemManage_Handler
200  .thumb_set MemManage_Handler,Default_Handler
201
202  .weak BusFault_Handler
203  .thumb_set BusFault_Handler,Default_Handler
204
205  .weak UsageFault_Handler
206  .thumb_set UsageFault_Handler,Default_Handler
207
208  .weak SVC_Handler
209  .thumb_set SVC_Handler,Default_Handler
210
211  .weak DebugMon_Handler
212  .thumb_set DebugMon_Handler,Default_Handler
213
214  .weak PendSV_Handler
215  .thumb_set PendSV_Handler,Default_Handler
216
217  .weak SysTick_Handler
218  .thumb_set SysTick_Handler,Default_Handler
219
220  .weak WDT_IRQHandler
221  .thumb_set WDT_IRQHandler,Default_Handler
222
223  .weak RTC_IRQHandler
224  .thumb_set RTC_IRQHandler,Default_Handler
225
226  .weak EFC_IRQHandler
227  .thumb_set EFC_IRQHandler,Default_Handler
228
229  .weak GPIOAB_IRQHandler
230  .thumb_set GPIOAB_IRQHandler,Default_Handler
231
232  .weak GPIOCD_IRQHandler
233  .thumb_set GPIOCD_IRQHandler,Default_Handler
234
235  .weak EXIT_IRQHandler
236  .thumb_set EXIT_IRQHandler,Default_Handler
237
238  .weak SRAM_PAPITY_IRQHandler
239  .thumb_set SRAM_PAPITY_IRQHandler,Default_Handler
240
241  .weak CLKRDY_IRQHandler
242  .thumb_set CLKRDY_IRQHandler,Default_Handler
243
244  .weak UART4_IRQHandler
245  .thumb_set UART4_IRQHandler,Default_Handler
246
247  .weak DMA_IRQHandler
248  .thumb_set DMA_IRQHandler,Default_Handler
249
250  .weak UART3_IRQHandler
251  .thumb_set UART3_IRQHandler,Default_Handler
252
253  .weak RSV_IRQHandler
254  .thumb_set RSV_IRQHandler,Default_Handler
255
256  .weak ADC_IRQHandler
257  .thumb_set ADC_IRQHandler,Default_Handler
258
259  .weak TIM1_BRK_UP_TRG_COM_IRQHandler
260  .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
261
262  .weak TIM1_CC_IRQHandler
263  .thumb_set TIM1_CC_IRQHandler,Default_Handler
264
265  .weak TIM2_IRQHandler
266  .thumb_set TIM2_IRQHandler,Default_Handler
267
268  .weak TIM3_IRQHandler
269  .thumb_set TIM3_IRQHandler,Default_Handler
270
271  .weak TIM6_IRQHandler
272  .thumb_set TIM6_IRQHandler,Default_Handler
273
274  .weak TIM7_IRQHandler
275  .thumb_set TIM7_IRQHandler,Default_Handler
276
277  .weak TIM14_IRQHandler
278  .thumb_set TIM14_IRQHandler,Default_Handler
279
280  .weak TIM15_IRQHandler
281  .thumb_set TIM15_IRQHandler,Default_Handler
282
283  .weak TIM16_IRQHandler
284  .thumb_set TIM16_IRQHandler,Default_Handler
285
286  .weak TIM17_IRQHandler
287  .thumb_set TIM17_IRQHandler,Default_Handler
288
289  .weak I2C1_IRQHandler
290  .thumb_set I2C1_IRQHandler,Default_Handler
291
292  .weak I2C2_IRQHandler
293  .thumb_set I2C2_IRQHandler,Default_Handler
294
295  .weak SPI1_IRQHandler
296  .thumb_set SPI1_IRQHandler,Default_Handler
297
298  .weak SPI2_IRQHandler
299  .thumb_set SPI2_IRQHandler,Default_Handler
300
301  .weak UART1_IRQHandler
302  .thumb_set UART1_IRQHandler,Default_Handler
303
304  .weak UART2_IRQHandler
305  .thumb_set UART2_IRQHandler,Default_Handler
306
307  .weak LPUART_IRQHandler
308  .thumb_set LPUART_IRQHandler,Default_Handler
309
310  .weak SPI3_IRQHandler
311  .thumb_set SPI3_IRQHandler,Default_Handler
312
313  .weak AES_IRQHandler
314  .thumb_set AES_IRQHandler,Default_Handler
315
316  .weak USB_IRQHandler
317  .thumb_set USB_IRQHandler,Default_Handler
318
319  .weak DAC_IRQHandler
320  .thumb_set DAC_IRQHandler,Default_Handler
321
322  .weak I2S_IRQHandler
323  .thumb_set I2S_IRQHandler,Default_Handler
324
325  .weak GPIOEF_IRQHandler
326  .thumb_set GPIOEF_IRQHandler,Default_Handler
327
328  .weak CAN1_IRQHandler
329  .thumb_set CAN1_IRQHandler,Default_Handler
330
331  .weak CAN2_IRQHandler
332  .thumb_set CAN2_IRQHandler,Default_Handler
333
334  .weak FPU_IRQHandler
335  .thumb_set FPU_IRQHandler,Default_Handler
336
337  .weak TIM4_IRQHandler
338  .thumb_set TIM4_IRQHandler,Default_Handler
339
340  .weak SPI4_IRQHandler
341  .thumb_set SPI4_IRQHandler,Default_Handler
342
343
344
345